Byte-Addressable Flash Storage Device for Memory Expansion

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Solution Overview

Problem

Current memory expansion techniques using flash memory face challenges with limited system DRAM capacity and shared DIMM bandwidth, impacting normal system operations and persistence due to the separation of system DRAM and flash storage.

Innovation Solution

A method and system that convert an electronic flash storage device with both byte-addressable and block-addressable storage regions into a single byte-addressable storage, allowing for dynamic memory allocation, deallocation, and data movement between regions to enhance memory efficiency and persistence.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If system DRAM is used alongside external flash storage for memory expansion, then memory capacity is improved, but system complexity increases due to separate devices and shared DIMM bus

Engineering Contradiction:
Improvememory capacityVSAvoidsystem complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent combines byte-addressable storage (ByAS) and block-addressable storage (BlAS) into a single unified flash storage device that presents a byte-addressable interface to the host. This merging eliminates the need for separate system DRAM and flash storage devices, reducing system complexity while maintaining expanded memory capacity. The unified device internally manages both storage types through a single controller architecture.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The flash storage device performs multiple functions by integrating both byte-addressable and block-addressable storage capabilities within a single device. It can operate as both a memory device (byte-addressable) and a storage device (block-addressable), eliminating the need for separate memory and storage devices. This multi-functionality reduces system complexity while providing expanded memory capacity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Quantity of substance

If system DRAM and flash storage are used as separate devices, then memory capacity is improved, but data persistence deteriorates due to separation of volatile and non-volatile storage

Engineering Contradiction:
Improvememory capacityVSAvoiddata persistence
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent merges volatile ByAS and non-volatile BlAS into a single unified flash storage device where all data is ultimately persisted in the non-volatile BlAS region. The byte-addressable interface provides memory-like speed while the underlying block-addressable flash storage ensures data persistence. This eliminates the persistence issues of having separate volatile and non-volatile devices.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The controller acts as an intermediary between the byte-addressable interface and the block-addressable flash storage. It manages data movements between ByAS and BlAS, ensuring that data accessed through the byte-addressable interface is properly persisted to the non-volatile BlAS region. This intermediary mechanism ensures data persistence while maintaining byte-addressable access semantics.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Quantity of substance

If DRAM cache and flash backend share the same DIMM bus, then memory capacity is improved, but system performance deteriorates due to bandwidth sharing

Engineering Contradiction:
Improvememory capacityVSAvoidsystem performance
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The patent merges the memory and storage functions into a single flash storage device with unified controller management. This eliminates the need for separate DIMM bus connections for DRAM cache and flash storage, removing the bandwidth sharing bottleneck. The unified device provides direct interface to the host system, improving performance while maintaining expanded memory capacity.

Inventive Principle:
Principle #5Merging (Combining)

4Device complexity

If byte-addressable and block-addressable storage are integrated in a single device, then device complexity is reduced, but manufacturing complexity increases

Engineering Contradiction:
Improvesystem complexityVSAvoidmanufacturing complexity
Core Design Contradiction:
Device complexityVSEase of manufacture

Solution Approach 1:

The patent segments the flash storage device into distinct functional regions: a byte-addressable storage (ByAS) region and a block-addressable storage (BlAS) region. Each region can be independently managed and optimized. This segmentation simplifies the control logic by providing clear boundaries between different storage modes, making the device easier to manufacture despite the integrated functionality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different access modes to different regions of the flash storage device. The ByAS region provides byte-addressable access optimized for memory-like operations, while the BlAS region provides block-addressable access optimized for storage operations. This local differentiation of access characteristics allows each region to be optimized for its specific purpose, simplifying the overall device architecture and manufacturing.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11726681B2Method and system for converting electronic flash storage device to byte-addressable nonvolatile memory module
Publication Date: 2023.08.15 SAMSUNG ELECTRONICS CO LTD
  • US11726681B2 patent drawing
  • US11726681B2 patent drawing
  • US11726681B2 patent drawing

AI summary

A method for converting an electronic flash storage device having a byte addressable storage (ByAS) and a block addressable flash storage (BlAS) to a single byte addressable storage includes receiving, by a host, a request for memory allocation from the ByAS, the receiving being from a first application among of a plurality of applications running on a processor; deallocating, by the host, a least relevant page allocated to at least one second application among the plurality of applications; moving, by the host, a content to the BlAS at a first BlAS location, the content related to the least relevant page, the moving based on the deallocation; allocating, by the host, the least relevant page to the first application; and updating, by the host, a cache metadata and a page lookup table of the first application and the at least one second application based on the deallocation and allocation.