Byte-Level Error Detection for Group Error Correction in Memory
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Solution Overview
Problem
Current error correction methods in data storage are inefficient in detecting and correcting errors, especially when the byte position of errors is unknown, and they do not effectively utilize the error signals to concentrate correction efforts on specific bytes.
Innovation Solution
A method that transforms data bits into first data bytes using a block error code, stores these in memory, reads and checks second data bytes for errors, and uses error signals to determine and correct group errors efficiently by transforming back the erroneous data bytes using an inverse transformation, allowing for parallel correction of errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error correction is performed on all data bytes without knowing error positions, then error correction coverage is complete, but correction complexity and processing time increase significantly
Solution Approach 1:
The patent divides the error correction task into two segments: first, error detection is performed on individual bytes using block error codes to identify which bytes contain errors; second, error correction is applied only to the identified erroneous bytes using group error correction codes. This segmentation avoids the complexity of correcting all bytes uniformly while ensuring complete error correction coverage.
Solution Approach 2:
The patent performs preliminary error detection using block error codes before performing the actual error correction. By first identifying which bytes contain errors through syndrome calculation and error signals, the system prepares the necessary information (error positions and patterns) before applying the correction operation, thereby reducing the complexity of the correction process itself.
2Measurement precision
If separate error detection circuits are used for each data byte, then error detection precision is high, but device complexity increases
Solution Approach 1:
The patent employs a universal error detection mechanism where the same block error code and syndrome calculation procedure can be applied to multiple data bytes. Instead of designing specialized detection circuits for each byte, a single error detection algorithm serves all bytes, maintaining high detection precision while reducing circuit complexity through functional uniformity.
Solution Approach 2:
The patent merges the error detection function across multiple bytes by using a unified block error code framework. Multiple data bytes are processed together through the same error detection logic, combining what would otherwise be separate detection operations into a single integrated process that reduces overall circuit complexity.
3Reliability
If transformation to block error code is applied to all data bits, then error detection capability is enhanced, but processing overhead increases
Solution Approach 1:
The patent segments the data processing into distinct phases: transformation of data bits to data bytes using block error codes for error detection, identification of erroneous bytes, and then correction only of those specific bytes. This segmentation allows error detection capability to be enhanced through transformation while minimizing processing overhead by avoiding unnecessary transformation and correction of error-free data.
Solution Approach 2:
The patent applies partial action by performing the full block error code transformation and error detection process only on data bytes that are suspected or confirmed to contain errors, rather than uniformly processing all data bytes. This reduces processing overhead while maintaining enhanced error detection capability where needed.
Data Source
AI summary
A solution is proposed for processing data bits, in which the data bits are transformed into first data bytes by means of a first transformation, in which the first data bytes are stored in a memory, in which second data bytes are read from the memory, in which each of the second data bytes, when there is no error, is a codeword of a block error code and in which one error signal per second data byte is determined that indicates whether or not this second data byte is a codeword.


