Byte Permute Unit for 128-Bit Shift Operations
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Solution Overview
Problem
Existing processor architectures face challenges in efficiently executing 128-bit shift operations, which can introduce latency due to the need for concatenating registers, and incur higher costs in terms of circuit area and power consumption for separate execution units for logical and arithmetic shift operations.
Innovation Solution
A processor design that includes a decode unit and a byte permute unit capable of determining whether an instruction is a shuffle or shift operation, using a byte shuffler to perform byte-level shifts and bit shifts, and generating output bits through arithmetic computations to optimize shift operations, including handling 128-bit operands and sign extension for arithmetic shifts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate execution units are used for logical and arithmetic shift operations, then the processor can perform both types of operations, but the circuit area and power consumption increase
Solution Approach 1:
The byte permute unit is designed to perform multiple functions including both logical and arithmetic shift operations, byte permutations, and shuffling operations using a single unified execution unit. The unit determines the operation type from the instruction and configures its internal logic accordingly, eliminating the need for separate dedicated units for each operation type while maintaining full functionality
Solution Approach 2:
The patent combines logical shift and arithmetic shift capabilities into a single byte permute unit that shares common hardware resources. The unit merges the control logic and data paths for both operation types, using instruction-based configuration to switch between modes, thereby reducing overall circuit area while preserving both operational capabilities
2Adaptability or versatility
If separate execution units are used for logical and arithmetic shift operations, then the processor can perform both types of operations, but power consumption increases
Solution Approach 1:
The byte permute unit serves as a universal execution unit that handles both logical and arithmetic shift operations along with other byte manipulation tasks. By consolidating multiple operation types into one unit, the processor reduces the total number of active circuits at any given time, thereby lowering overall power consumption while maintaining operational versatility
Solution Approach 2:
The patent merges the power-consuming circuits for logical and arithmetic shifts into a single shared unit with instruction-controlled mode switching. This consolidation eliminates redundant circuitry and reduces dynamic power consumption by avoiding simultaneous operation of separate dedicated units, while still providing full support for both operation types
3Adaptability or versatility
If 128-bit shift operations are performed by concatenating two 64-bit registers, then 128-bit operands can be accommodated, but additional latencies are introduced into the critical path
Solution Approach 1:
The byte permute unit processes 128-bit operands by segmenting them into byte-sized units (16 bytes) and applying permutation and shift operations to each segment independently through parallel processing. This segmentation approach allows the unit to handle wide operands without requiring sequential register concatenation operations, thereby reducing latency while maintaining 128-bit capability
Solution Approach 2:
Instead of handling 128-bit operands as a single wide data path requiring register concatenation, the patent transforms the operation into byte-granularity processing where 16 separate 8-bit units are manipulated in parallel. This dimensional transformation from bit-level to byte-level processing eliminates the need for register concatenation and reduces critical path latency
Data Source
AI summary
A processor includes a decode unit and a byte permute unit. The byte permute unit receives an instruction from the decode unit. The byte permute unit determines whether the instruction corresponds to a shuffle instruction or a shift instruction. For a shuffle instruction, the byte permute unit uses a byte shuffler to perform a shuffle operation indicated by the instruction. For a shift instruction that indicates a shift magnitude, the byte permute unit uses the byte shuffler to byte-level shift a source operand corresponding to the instruction by an integer number of bytes. The byte permute unit also generates a sequence of output bits by bit-shifting the byte-level shifted source operand by a number of bits such that the sum of the number of bits and the integer number of bytes is equal to the shift magnitude.