C-Shaped Active Area Semiconductor Device With Back Gate
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Solution Overview
Problem
Current semiconductor devices, such as FinFET and MBCFET, face limitations in increasing integration density and enhancing performance due to their device structure.
Innovation Solution
A semiconductor device with a C-shaped active area is developed, featuring a channel portion extending vertically on a substrate, source/drain portions at the upper and lower ends, and a gate stack that overlaps the channel portion, along with a back gate stack on the outer sidewall, allowing for a novel structure that enhances performance and density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional device structures (FinFET, MBCFET) are used, then manufacturing process is relatively simple, but integration density and device performance cannot be sufficiently increased
Solution Approach 1:
The patent transitions from planar 2D channel structures to a 3D vertical channel structure with C-shaped active area. The channel extends vertically from the substrate, and source/drain portions wrap around the channel in a C-shape configuration, utilizing the third dimension (vertical direction) to increase effective channel area and integration density without proportionally increasing footprint area.
Solution Approach 2:
The source/drain portions are positioned to wrap around and enclose portions of the vertical channel structure, creating a nested configuration where source/drain regions are embedded within the spatial envelope of the channel. This nesting increases the effective interface area between source/drain and channel, improving carrier injection efficiency and device performance.
2Reliability
If device structure is simplified, then manufacturing is easier, but performance enhancement and integration density improvement are limited
Solution Approach 1:
The gate structure is segmented into multiple independent gate stacks: front gate stacks positioned on opposite sides of the C-shaped active area, and a back gate stack positioned on the outer sidewall. This segmentation allows independent control of different channel regions, enabling fine-tuned performance optimization, threshold voltage control, and carrier flow management without requiring a monolithic complex structure.
Solution Approach 2:
Different gate structures are applied to different regions of the channel: front gates on inner sidewalls for primary control, and back gate on outer sidewall for additional modulation. This localized gating approach optimizes electrical characteristics in specific regions, enhancing overall device performance while maintaining manufacturing feasibility through modular fabrication steps.
Data Source
AI summary
A C-shaped active area semiconductor device and a method of manufacturing the same and electronic device including the semiconductor device are provided. According to embodiments, the semiconductor device includes: a channel portion extending vertically on a substrate; source/drain portions located at upper and lower ends of the channel portion relative to the substrate and along the channel portion, wherein the source/drain portion extends toward a side of the channel portion in a lateral direction relative to the substrate, so that the source/drain portions and the channel portion constitute a C-shaped structure; a gate stack that overlaps the channel portion on an inner sidewall of the C-shaped structure, wherein the gate stack has a portion surrounded by the C-shaped structure; and a back gate stack overlapping the channel portion on an outer sidewall of the C-shaped structure.