C-2C Capacitor Array for Low THD in Switched-Capacitor PGA

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Solution Overview

Problem

Switched capacitor programmable gain amplifiers (PGAs) face challenges with high harmonic distortion and gain non-linearity due to non-ideal effects like charge injection and clock feed-through, especially as target resolutions and operating speeds increase, making it difficult to achieve practical capacitor sizes and efficient signal processing.

Innovation Solution

The implementation of a C-2C capacitor array with constant VGS switches in the PGA circuit reduces harmonic distortion by optimizing the sampling and feedback capacitance ratio, minimizing charge injection and clock feed-through errors, and allowing for digital programmability of gain settings without requiring impractically small capacitors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If switched capacitor PGA circuits are used to achieve adjustable gain and wide signal range amplification, then gain programmability and signal range are improved, but harmonic distortion increases and gain linearity deteriorates due to charge injection and clock feed-through effects

Engineering Contradiction:
Improvegain programmabilityVSAvoidharmonic distortion
Core Design Contradiction:
Adaptability or versatilityVSObject-generated harmful factors

Solution Approach 1:

The capacitor array is divided into multiple segmented capacitors (C1, C2, C3, C4) that can be independently switched. This segmentation allows selective connection of capacitor pairs to achieve different gain settings while maintaining symmetry, thereby reducing harmonic distortion caused by charge injection and clock feed-through effects.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs symmetric capacitor pairing (C1-C2, C3-C4) with equal capacitance values within each pair. This symmetric arrangement compensates for charge injection and clock feed-through errors by ensuring that distortion-generating effects are equal and opposite, thereby canceling each other out and improving gain linearity.

Inventive Principle:
Principle #4Asymmetry

2Speed

If capacitor sizes are reduced to achieve higher operating speeds and resolutions, then operating speed and resolution are improved, but manufacturing precision becomes difficult to achieve and circuit performance deteriorates

Engineering Contradiction:
Improveoperating speedVSAvoidcapacitor size precision
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

The patent combines multiple capacitor pairs in parallel to achieve the required total capacitance values. By merging capacitors C1 and C2, as well as C3 and C4, the circuit achieves sufficient capacitance for stable operation at high speeds without requiring impractically small individual capacitor sizes, thereby maintaining manufacturing precision.

Inventive Principle:
Principle #5Merging (Combining)

3Measurement precision

If fine control over gain is implemented to achieve high resolution, then gain control precision is improved, but circuit complexity increases and non-ideal effects become more pronounced

Engineering Contradiction:
Improvegain control precisionVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The switched capacitor network serves multiple functions simultaneously: it provides gain programmability through selective capacitor connection, maintains gain linearity through symmetric pairing, and reduces harmonic distortion through balanced charge injection cancellation. This multi-functionality achieves fine gain control without proportionally increasing circuit complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS7276962B1Circuit topology for reduced harmonic distortion in a switched-capacitor programmable gain amplifier
Publication Date: 2007.10.02 NAT SEMICON CORP
  • US7276962B1 patent drawing
  • US7276962B1 patent drawing
  • US7276962B1 patent drawing

AI summary

A switched-capacitor programmable gain amplifier (PGA) has improved circuit performance that avoids impracticably small capacitors, while providing low total harmonic distortion (THD) and reasonable gain linearity. The sampling capacitor (CS) in the PGA is designed with a C-2C capacitor array. Gain settings from the C-2C capacitor array arranged for selection with constant VGS switches. The gain of the resulting PGA corresponds to the ratio of the effective capacitance of the C-2C array and the effective capacitance value of the feedback capacitor (CF). The resulting performance of the PGA has reduced charge injection and clock feed-through errors, and thus reduced THD.