C60 Molecule Tunneling Barriers for Flash Memory Scalability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing flash memory technologies face limitations in scalability due to the ratio between retention time and program/erase time, primarily because of the asymmetry in field asymmetric tunneling processes, which restricts the scalability of P/E voltage, leading to issues with power dissipation, cycling endurance, and peripheral circuitry design.
Innovation Solution
Incorporating C60 molecules with monodispersive characteristics into the tunnel insulating layer of semiconductor devices, providing accessible energy levels for resonant tunneling processes, and being compatible with conventional manufacturing processes, thereby enhancing the retention time to program/erase time ratios by creating a field-sensitive tunneling barrier.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of moving object
If field asymmetric tunneling processes are engineered in conventional flash memory, then retention time is improved, but program/erase time increases and scalability is limited
Solution Approach 1:
The patent applies asymmetry by embedding monodispersive molecules (such as C60 fullerenes) with specific energy levels in the tunnel insulating layer, creating an asymmetric tunneling barrier that enables resonant tunneling at specific energy levels. This molecular engineering creates inherent asymmetry in the tunneling characteristics, allowing selective enhancement of retention while maintaining efficient program/erase operations through resonant tunneling mechanisms.
Solution Approach 2:
The patent changes the energy level parameters of the tunneling barrier by incorporating molecules with prescribed energy levels (e.g., C60 with its characteristic LUMO level). This parameter modification enables resonant tunneling at specific energy levels, fundamentally altering the tunneling characteristics to achieve both long retention times and efficient program/erase operations without the traditional trade-off.
2Productivity
If P/E voltage is scaled up to improve program/erase speed, then productivity is improved, but power dissipation and cycling endurance deteriorate
Solution Approach 1:
The patent changes the tunneling barrier parameters by embedding molecules with specific energy levels, enabling resonant tunneling that achieves high program/erase speeds at lower voltages. This parameter modification of the tunneling barrier allows efficient charge injection and extraction without requiring high voltage scaling, thereby reducing power dissipation and improving cycling endurance.
Solution Approach 2:
The patent replaces the conventional high-voltage field-induced tunneling mechanism with a molecular resonant tunneling mechanism. Instead of relying on high electric fields to drive tunneling, the system uses quantum mechanical resonant tunneling through molecular energy levels, substituting the mechanical/electrical field-driven process with a quantum-mechanical resonance process that is more energy-efficient.
3Duration of action of moving object
If conventional tunnel insulating layers are used, then manufacturing simplicity is maintained, but retention time to program/erase time ratio is insufficient
Solution Approach 1:
The patent creates a composite tunnel insulating layer by embedding monodispersive molecules (such as C60 fullerenes) within the conventional silicon oxide matrix. This composite structure combines the excellent insulating properties of SiO2 with the quantum mechanical resonant tunneling characteristics of the embedded molecules, achieving superior retention time to program/erase time ratios while remaining compatible with conventional semiconductor manufacturing processes.
Solution Approach 2:
The patent introduces monodispersive molecules as intermediary elements within the tunnel insulating layer. These molecules act as mediators that facilitate resonant tunneling at specific energy levels, enabling precise control of charge transport while maintaining the overall insulating function of the tunnel barrier. This intermediary approach allows molecular engineering of tunneling characteristics without completely replacing the conventional tunnel insulator.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in an improvement of more than an order of magnitude in retention time to program/erase time ratios for nonvolatile memory, enabling more efficient and scalable flash memory technology.
Implementation Method 1
C60 molecules in the tunneling barrier provide accessible energy levels in semiconductor devices for resonant tunneling processes
Implementation Method 2
the Fowler-Nordheim tunneling under data P/E
Implementation Method 3
the direct tunneling during data retention
Implementation Method 4
this process is quenched at low fields due to HOMO-LUMO gap and large charging energy of C60
Data Source
AI summary
Embodiments of tunneling barriers and methods for same can embed modules exhibiting a monodispersion characteristic into a dielectric layer (e.g., between first and second layers forming a dielectric layer). In one embodiment, by embedding C60 molecules inbetween first and second insulating layers forming a dielectric layer, a field sensitive tunneling barrier can be implemented. In one embodiment, the tunneling barrier can be between a floating gate and a channel in a semiconductor structure. In one embodiment, a tunneling film can be used in nonvolatile memory applications where C60 provides accessible energy levels to prompt resonant tunneling through the dielectric layer upon voltage application.