CA-Based Decompression Circuit for Parallel IC Chip Testing
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Solution Overview
Problem
The existing IC chip testing methods are time-consuming and costly due to the limited number of input and output pins, requiring a large quantity of test stimuli to be input in a serial mode and compared, which increases test time and costs.
Innovation Solution
A decompression circuit utilizing a plurality of cellular automaton (CA) circuits and a phase shifter is introduced, which expands randomness of test signals through the CA circuits and outputs a large quantity of test signals via the phase shifter to efficiently test components in the IC chip.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a large quantity of test stimuli are input in serial mode through limited input pins, then the test coverage of components in the IC chip is improved, but the test time increases significantly
Solution Approach 1:
The decompression circuit is divided into multiple sub-circuits, each capable of independently generating test stimuli. This segmentation allows parallel generation of test patterns, reducing the time required to generate a large quantity of test stimuli compared to serial input methods.
Solution Approach 2:
The patent transitions from one-dimensional serial input to multi-dimensional parallel generation by using multiple sub-circuits that can simultaneously produce test stimuli. The phase shifter further expands this by creating multiple output channels from a single input stream, effectively adding temporal and spatial dimensions to the test stimulus generation process.
2Adaptability or versatility
If a large quantity of test stimuli are input through limited input pins, then comprehensive component testing is achieved, but the testing process becomes time-consuming
Solution Approach 1:
The decompression circuit performs preliminary expansion of test stimuli before they reach the DUT. By pre-generating and expanding the test patterns through multiple sub-circuits and phase shifters, the system prepares comprehensive test coverage in advance, allowing the actual testing phase to proceed more quickly without sacrificing coverage.
Solution Approach 2:
The decompression circuit acts as an intermediary between the limited input pins and the DUT. It receives compact test stimuli from the input pins, expands them into a large quantity of test patterns through multiple sub-circuits, and delivers them to the DUT, thereby bridging the gap between limited input resources and comprehensive testing requirements.
3Device complexity
If test stimuli are input serially through limited pins, then the hardware configuration remains simple, but the test cost increases due to extended test time
Solution Approach 1:
The patent creates multiple copies of the basic CA circuit structure within each sub-circuit. These replicated units work in parallel to generate test stimuli, providing a cost-effective solution that scales testing capacity without requiring completely new hardware architectures. The modular copying approach balances complexity increase with testing capability improvement.
Data Source
AI summary
This application provides decompression circuits. An example decompression circuit includes a plurality of sub-circuits. The sub-circuit includes a plurality of cellular automaton (CA) circuits and a phase shifter. Each of the plurality of CA circuits includes a first XOR circuit and a register. The first XOR circuit includes a first input end, a second input end, and an output end. A data input end of the register is coupled to the output end of the first XOR circuit. A data output end of the register is coupled to the first input end of the first XOR circuit and an input end of the phase shifter. The data output end of the register is further coupled to the second input end of the first XOR circuit in a different CA circuit. The phase shifter is configured to output a test signal.


