Channel-All-Around Transistor Structure for Low Reverse Leakage
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Solution Overview
Problem
The existing MOS transistors have a high reverse leakage current due to metal-semiconductor contacts, which affects their performance.
Innovation Solution
A transistor design where the channel surrounds a gate with a dielectric layer in between, and both the source and drain are made of semiconductor material, forming a semiconductor-semiconductor contact to reduce reverse leakage current and improve performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metal-semiconductor contacts are used for source and drain, then electrical conductivity is improved, but reverse leakage current increases
Solution Approach 1:
The patent changes the material parameter of the source and drain from metal to semiconductor material. This parameter change eliminates the Schottky barrier formed by metal-semiconductor contacts, thereby reducing reverse leakage current while maintaining electrical conductivity through proper semiconductor material selection and doping.
Solution Approach 2:
The patent employs composite material structures where semiconductor materials are used for both source/drain and channel regions. This composite approach allows optimization of electrical properties throughout the device, reducing harmful reverse leakage effects while maintaining good conductivity through coordinated material selection and doping profiles.
2Speed
If channel length is reduced to increase speed, then electron mobility is improved, but short-channel effects increase
Solution Approach 1:
The patent changes the material composition and doping parameters of the channel region to achieve high electron mobility even at reduced channel lengths. By selecting appropriate semiconductor materials and optimizing doping concentrations, the device maintains strong gate control and suppresses short-channel effects while enabling faster electron transport.
Solution Approach 2:
The patent uses composite semiconductor material structures in the channel region, potentially incorporating different material layers or compositions to enhance electron mobility. This composite approach allows the channel to maintain excellent electrical properties and strong electrostatic control despite reduced dimensions, effectively suppressing short-channel effects.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design reduces reverse leakage current, mitigates short-channel effects, and enhances transistor performance by eliminating Schottky barriers and floating body effects, resulting in improved channel control and reduced power consumption in memory devices.
Implementation Method 1
a dielectric layer, located between the gate and the channel, insulating and isolating the gate and the channel
Implementation Method 2
The MOS transistor uses an electric field formed by the gate to control an amount of induced charge in the channel, to further change a state of the channel
Data Source
AI summary
The present disclosure provides a transistor and a manufacturing method thereof, and a memory, relates to the technical field of semiconductors. The transistor includes: a channel, wherein an accommodation space is formed therein; a gate, provided with a first end and a second end that are opposite, wherein the first end of the gate is located inside the accommodation space, and the second end of the gate is located outside the accommodation space; a dielectric layer, located between the gate and a channel, insulating and isolating the gate and the channel; a source, provided at one end of the channel; and a drain, provided at the other end of the channel, wherein the drain and the source are arranged at intervals along a length direction of the channel, and the source, the drain, and the channel are each made of a semiconductor material.