CAAC-OS Oxide Semiconductor Film for Transistor Reliability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor devices face challenges in achieving favorable electrical characteristics, high reliability, small variation in transistor characteristics, and miniaturization, particularly in oxide semiconductor materials used for transistors and memory elements.
Innovation Solution
The development of an oxide semiconductor film with a high c-axis aligned crystal proportion, formed using a sputtering method with specific atomic ratios of In, Ga, and Zn, and including a CAAC-OS structure, which reduces carrier scattering and impurity concentration, enhancing field-effect mobility and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a transistor is formed using conventional oxide semiconductor materials, then the device can be manufactured with existing processes, but the electrical characteristics and reliability are insufficient
Solution Approach 1:
The patent applies parameter changes by precisely controlling the atomic ratios of In, Ga, and Zn in the oxide semiconductor film to achieve a specific composition range that forms the CAAC-OS structure. This compositional parameter optimization enables high reliability while maintaining compatibility with existing sputtering manufacturing processes
Solution Approach 2:
The patent uses composite materials by creating an In-Ga-Zn oxide semiconductor with a specific multi-element composition that forms a CAAC-OS structure. This composite oxide material combines the benefits of multiple metal elements to achieve superior electrical characteristics and reliability compared to conventional single-element oxide semiconductors
2Manufacturing precision
If the oxide semiconductor film uses random crystal orientation, then the manufacturing process is simpler, but the field-effect mobility is reduced due to carrier scattering
Solution Approach 1:
The patent applies local quality by achieving c-axis alignment specifically in the channel region of the transistor where high field-effect mobility is critical. The crystal orientation is optimized locally in the active area while maintaining overall structure compatibility with standard manufacturing processes
Solution Approach 2:
The patent transitions from random three-dimensional crystal orientation to controlled two-dimensional c-axis alignment perpendicular to the substrate surface. This dimensional constraint simplifies the crystal structure while maximizing carrier mobility by eliminating scattering from misoriented grains
3Area of moving object
If the transistor size is reduced for miniaturization, then the device density increases, but the variation in characteristics increases
Solution Approach 1:
The patent uses parameter changes by optimizing the atomic ratios of In, Ga, and Zn within specific ranges to achieve a composition that forms the CAAC-OS structure. This precise compositional control ensures uniform electrical characteristics even when transistors are miniaturized, reducing variation while enabling smaller device areas
Solution Approach 2:
Instead of trying to control characteristic variation through device geometry or processing adjustments after fabrication, the patent inverts the approach by controlling the fundamental crystal structure and composition parameters beforehand. This preventive approach to uniformity reduces variation inherently across all device sizes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in semiconductor devices with improved electrical characteristics, high reliability, reduced variation, and suitability for miniaturization, leveraging the CAAC-OS structure to increase the CAAC proportion and minimize spinel crystal structures for enhanced performance.
Implementation Method 1
formed using a sputtering method with specific atomic ratios of In, Ga, and Zn
Data Source
AI summary
Favorable electrical characteristics are given to a semiconductor device. Furthermore, a semiconductor device having high reliability is provided. One embodiment of the present invention is an oxide semiconductor film having a plurality of electron diffraction patterns which are observed in such a manner that a surface where the oxide semiconductor film is formed is irradiated with an electron beam having a probe diameter whose half-width is 1 nm. The plurality of electron diffraction patterns include 50 or more electron diffraction patterns which are observed in different areas, the sum of the percentage of first electron diffraction patterns and the percentage of second electron diffraction patterns accounts for 100%, the first electron diffraction patterns account for 90% or more, the first electron diffraction pattern includes observed points which indicates that a c-axis is oriented in a direction substantially perpendicular to the surface where the oxide semiconductor film is formed.