CAAC-OS Transistor with Amorphous Source Drain Regions
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Solution Overview
Problem
Transistors using amorphous silicon have low field-effect mobility and are suitable for larger substrates, while those using polycrystalline silicon have high mobility but are not suitable for larger substrates, and there is a need for a semiconductor device with reduced short-channel effects, miniaturization, and improved on-state current.
Innovation Solution
A semiconductor device with a c-axis-aligned crystalline oxide semiconductor (CAAC-OS) film, including a pair of amorphous oxide semiconductor regions as source and drain regions and a channel region made from a non-single-crystal material with a triangular or hexagonal atomic arrangement, where ions are added to reduce contact resistance and parasitic capacitance, and heat treatment is performed to enhance crystallinity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If amorphous silicon is used to manufacture transistors, then the transistors can be manufactured over larger glass substrates, but the field-effect mobility is low
Solution Approach 1:
The invention changes the material parameter from conventional amorphous silicon to oxide semiconductor (such as IGZO), which enables high field-effect mobility while maintaining compatibility with large-area glass substrate manufacturing processes
Solution Approach 2:
The invention uses a composite structure combining oxide semiconductor material with specific crystalline phases (CAAC-OS) and amorphous regions, achieving both high mobility and large-area manufacturability
2Speed
If polycrystalline silicon is used to manufacture transistors, then the field-effect mobility is high, but they are not suitable for being manufactured over larger glass substrates
Solution Approach 1:
The invention changes the material from polycrystalline silicon to oxide semiconductor, which can achieve comparable or superior mobility while being compatible with low-temperature large-area manufacturing techniques
Solution Approach 2:
The invention creates local crystalline regions (CAAC-OS) within an otherwise amorphous matrix, providing high mobility pathways while maintaining overall amorphous structure suitable for large-area fabrication
3Volume of moving object
If transistor size is reduced for miniaturization, then device density increases, but short-channel effects cause variation in electric characteristics
Solution Approach 1:
The invention changes the semiconductor material properties to oxide semiconductor with high mobility and appropriate band structure, which reduces short-channel effects and maintains stable electric characteristics even in miniaturized transistors
Solution Approach 2:
The invention uses amorphous and amorphous-like oxide semiconductor regions that can be easily formed and reformed, providing robust performance despite device scaling
4Reliability
If highly conductive oxide semiconductor containing nitrogen is provided as buffer layers, then contact resistance is reduced, but device complexity increases
Solution Approach 1:
The invention applies nitrogen-containing oxide semiconductor selectively in specific regions (source and drain regions) rather than throughout the entire device, reducing contact resistance while minimizing added complexity
Solution Approach 2:
The oxide semiconductor material serves multiple functions: as the main channel material, as source/drain regions, and as buffer layers, eliminating the need for separate specialized layers
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces variation in electric characteristics due to short-channel effects, enables miniaturization, and improves on-state current by reducing contact resistance and parasitic capacitance, while maintaining high conductivity and reliability.
Implementation Method 1
a c-axis-aligned crystalline oxide semiconductor (CAAC-OS) film, including a pair of amorphous oxide semiconductor regions as source and drain regions and a channel region made from a non-single-crystal material with a triangular or hexagonal atomic arrangement
Implementation Method 2
heat treatment is performed to enhance crystallinity
Implementation Method 3
ions are added to reduce contact resistance
Data Source
AI summary
A miniaturized semiconductor device including a transistor in which a channel formation region is formed using an oxide semiconductor film and variation in electric characteristics due to a short-channel effect is suppressed is provided. In addition, a semiconductor device whose on-state current is improved is provided. A semiconductor device is provided with an oxide semiconductor film including a pair of second oxide semiconductor regions which are amorphous regions and a first oxide semiconductor region located between the pair of second oxide semiconductor regions, a gate insulating film, and a gate electrode provided over the first oxide semiconductor region with the gate insulating film interposed therebetween. One or more kinds of elements selected from Group 15 elements such as nitrogen, phosphorus, and arsenic are added to the second oxide semiconductor regions.