CAAC Oxide Semiconductor Layer for Stable Transistor Characteristics
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Solution Overview
Problem
Current semiconductor devices using oxide semiconductors face challenges in achieving high reliability, low power consumption, and small variations in electrical characteristics, particularly in transistor performance, due to issues with crystallinity and impurity incorporation during manufacturing.
Innovation Solution
The development of an oxide semiconductor layer with a c-axis aligned crystalline (CAAC) structure, formed using a combination of ALD and sputtering methods, which includes indium, zinc, and other metal oxides, to enhance crystallinity and reduce impurity incorporation, resulting in improved electrical characteristics and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional oxide semiconductor layers are used, then manufacturing is simpler, but electrical characteristics show large variations and reliability is poor
Solution Approach 1:
The oxide semiconductor layer is divided into multiple distinct layers (first oxide semiconductor layer, second oxide semiconductor layer, third oxide semiconductor layer) with different compositions and functions. Each layer is optimized for specific purposes: the first layer provides base semiconductor properties, the second layer enhances crystallinity with CAAC structure, and the third layer improves interface quality. This segmentation allows each layer to contribute specifically to reliability while managing overall complexity through functional specialization.
Solution Approach 2:
The invention uses composite oxide semiconductor structures combining different material compositions (In-Ga-Zn-O, In-Al-Zn-O, In-Sn-Zn-O) in a stacked configuration. Each layer has tailored composition ratios and crystalline structures, creating a composite material system that achieves superior electrical characteristics and reliability compared to single-layer structures. The composite approach allows optimization of each layer's properties to compensate for weaknesses in individual materials.
2Reliability
If oxide semiconductor layers with impurities are used, then manufacturing is easier, but electrical characteristics deteriorate due to impurity-related defects
Solution Approach 1:
The invention systematically varies critical parameters including metal element composition ratios (In:Ga:Zn = 1:1:1 to 1:3:2), layer thicknesses (5 nm to 50 nm per layer), and crystalline structure characteristics (c-axis alignment degree). By optimizing these parameters, the patent achieves high crystallinity with CAAC structure while minimizing impurity incorporation. The parameter changes enable precise control over electrical characteristics and reliability without compromising manufacturability.
Solution Approach 2:
Different regions of the oxide semiconductor structure are assigned different qualities and compositions. The first layer near the substrate has composition optimized for adhesion and base functionality, the second layer in the middle has enhanced crystallinity for carrier transport, and the third layer at the top has optimized interface properties for electrode contact. This local quality differentiation ensures each region performs its specific function optimally while contributing to overall electrical stability and reliability.
3Power
If simple oxide semiconductor structures are used, then power consumption is higher due to leakage current, but device performance is lower
Solution Approach 1:
The multi-layer oxide semiconductor structure serves multiple functions simultaneously: it provides high on-state current through enhanced crystallinity and carrier mobility in the second layer, maintains low off-state leakage through optimized composition and interface quality in all layers, and ensures stable electrical characteristics through the composite structure. Each layer contributes to different aspects of power efficiency, making the overall structure universally beneficial for both on-state and off-state performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The CAAC structure oxide semiconductor layer achieves high on-state current, increased field-effect mobility, and reduced impurity-related defects, leading to more reliable and efficient semiconductor devices with improved performance and stability.
Implementation Method 1
the oxide semiconductor layer has a c-axis aligned crystalline (CAAC) structure
Implementation Method 2
formed using a combination of ALD and sputtering methods
Implementation Method 3
formed using a combination of ALD and sputtering methods
Implementation Method 4
formed using a combination of ALD and sputtering methods
Data Source
AI summary
A semiconductor device including an oxide semiconductor layer which is formed over a substrate and includes indium is provided. The oxide semiconductor layer is formed in parallel or substantially in parallel with a surface of the substrate. The oxide semiconductor layer includes a first region, a second region over the first region, and a third region over the second region. The first region is located in a range from a formation surface of the oxide semiconductor layer to greater than or equal to 0 nm to less than or equal to 3 nm in a direction substantially perpendicular to the formation surface. In cross-sectional observation of the oxide semiconductor layer using a transmission electron microscope, bright spots arranged in a layered manner in a direction parallel to the formation surface are observed in each of the first region, the second region, and the third region.