CAAC Oxide Transistor Structure for Low Variation and Reliability
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Solution Overview
Problem
Current semiconductor devices face challenges in achieving small variation in transistor characteristics, high reliability, favorable electrical characteristics, high on-state current, miniaturization, and low power consumption, particularly in oxide semiconductor-based transistors.
Innovation Solution
A semiconductor device structure is developed with a specific configuration of conductors and insulators, including a metal oxide with a c-axis aligned crystalline structure, where the oxide layers have varying atomic ratios of indium to other elements, and additional insulator layers to control impurity diffusion and oxygen supply, reducing defects and enhancing crystallinity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an oxide semiconductor with CAAC structure is used to form a transistor, then the electrical characteristics are improved, but the variation in transistor characteristics remains large
Solution Approach 1:
The patent applies local quality by creating distinct oxide semiconductor layers with different compositions and functions. Specifically, it uses an In-Ga-Zn-O layer with a specific atomic ratio (In:Ga:Zn = 1:1:1 or similar) as the channel formation layer, while other layers may have different ratios. This local differentiation of material composition ensures that the channel region has optimized electrical characteristics while maintaining uniformity within that specific region, thereby reducing variation in transistor characteristics.
Solution Approach 2:
The patent employs parameter changes by precisely controlling the atomic ratios of elements in the oxide semiconductor layers. It specifies particular ranges for In:Ga:Zn atomic ratios (e.g., 1:1:1, or broader ranges like 0.5-2:1:1) and controls oxygen content to achieve a stoichiometric or near-stoichiometric composition. These parameter optimizations ensure consistent electrical characteristics across devices while maintaining the CAAC structure benefits.
2Productivity
If the transistor size is reduced for miniaturization, then the integration density increases, but the on-state current decreases
Solution Approach 1:
The patent utilizes parameter changes by optimizing the atomic ratio of In:Ga:Zn in the oxide semiconductor layer to enhance carrier mobility. By achieving specific compositional ratios and maintaining CAAC structure, the material exhibits high electron mobility even in miniaturized transistors. This allows smaller channel dimensions to maintain adequate on-state current while achieving higher integration density.
Solution Approach 2:
The patent employs composite materials by combining multiple elements (In, Ga, Zn, and O) in specific ratios to create an In-Ga-Zn-O oxide semiconductor with superior electrical properties. This composite structure provides both high carrier mobility for adequate on-state current and stability for miniaturized devices, allowing integration density to increase without proportionally sacrificing current capability.
3Reliability
If multiple insulator layers are added to control impurity diffusion, then the reliability improves, but the device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the insulator structure into multiple functional layers, each with a specific role in impurity diffusion control. It typically includes a first insulator layer in direct contact with the oxide semiconductor channel, a second insulator layer for additional barrier functionality, and potentially a third layer for stress control or interface protection. This segmented approach provides systematic impurity blocking while maintaining clear functional differentiation, making the complexity manageable through organized layer functions.
Solution Approach 2:
The patent uses intermediary insulator layers as mediator structures between the oxide semiconductor channel and other device components. These insulator layers act as intermediate barriers that prevent direct interaction and impurity diffusion between adjacent regions. The first insulator layer serves as an immediate protective intermediary, while additional layers provide cascading protection, systematically reducing impurity diffusion without requiring direct modification of the channel structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a semiconductor device with reduced variation in transistor characteristics, improved reliability, high on-state current, and low power consumption, enabling miniaturization and high integration while maintaining stable electrical performance.
Implementation Method 1
a metal oxide with a c-axis aligned crystalline structure
Implementation Method 2
additional insulator layers to control impurity diffusion
Implementation Method 3
oxford layers have varying atomic ratios of indium to other elements, and additional insulator layers to control impurity diffusion and oxygen supply, reducing defects and enhancing crystallinity
Data Source
AI summary
A semiconductor device with small variations in transistor characteristics is provided. The semiconductor device includes an oxide; a first conductor and a second conductor provided apart from each other over the oxide; an insulator in a region between the first conductor and the second conductor over the oxide; and a conductor over the insulator. A side surface of the oxide, a top surface of the first conductor, a side surface of the first conductor, a top surface of the second conductor, and a side surface of the second conductor include regions in contact with a nitride containing silicon.