CABAC Arithmetic Decoding Interface for Real-Time HD Video

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Solution Overview

Problem

Conventional CABAC decoding systems face inefficiencies due to software handling most syntax elements, leading to low decoding performance and complex interactions between software and hardware, which hinders real-time and high-definition video processing capabilities.

Innovation Solution

A context-based adaptive binary arithmetic decoding apparatus that utilizes hardware to decode all CABAC syntax elements, with software controlling the process and maintaining context probability models, reducing software-hardware interaction complexity and improving bitstream compression ratios.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If software handles most syntax elements in CABAC decoding, then implementation flexibility is maintained, but decoding speed and real-time processing capability deteriorate

Engineering Contradiction:
Improvedecoding speedVSAvoidsoftware-hardware interaction complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent segments the syntax elements into two categories: coefficient syntax elements decoded by hardware and other syntax elements decoded by software. This segmentation allows the hardware to focus on computationally intensive coefficient decoding to improve speed, while software handles other elements, maintaining a manageable division of labor and controlling interaction complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary interface layer that manages communication between software and hardware components. This intermediary structure standardizes the exchange of data and control signals, reducing the complexity of software-hardware interactions while enabling high-speed hardware decoding of coefficient syntax elements.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If hardware decodes all syntax elements, then decoding performance and real-time capability are improved, but resource utilization efficiency deteriorates

Engineering Contradiction:
Improvedecoding performanceVSAvoidresource utilization efficiency
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent divides syntax element decoding into two segments: coefficient syntax elements processed by hardware and other syntax elements processed by software. This segmentation ensures that hardware resources are allocated only to the computationally intensive coefficient decoding tasks where they provide maximum benefit, avoiding waste of hardware resources on simpler tasks that software can handle efficiently.

Inventive Principle:
Principle #1Segmentation

3Productivity

If hardware accelerates only coefficient decoding, then decoding efficiency is improved, but software-hardware interaction complexity increases

Engineering Contradiction:
Improvedecoding efficiencyVSAvoidsoftware-hardware interaction complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces a well-defined interface mechanism that acts as an intermediary between software and hardware. This interface standardizes the exchange of control signals and data, managing the complexity of coordination while enabling efficient hardware acceleration of coefficient decoding without requiring complex ad-hoc communication protocols.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP1912443B1Context-based adaptive arithmetic decoding system and apparatus
Publication Date: 2012.06.06 HUAWEI TECH CO LTD
  • EP1912443B1 patent drawingFigure 1~2
  • EP1912443B1 patent drawingFigure 3
  • EP1912443B1 patent drawingFigure 4~5

AI summary

A context-based adaptive binary arithmetic decoding system and apparatus are disclosed. The system includes a control unit, a decoding unit and an interface unit; the control unit is adapted to fill bitstreams into the decoding unit and configure and control the decoding unit via the interface unit; the decoding unit is adapted to decode all syntax elements in the macroblock layer for the bitstreams, assemble the syntax elements and send the assembled syntax elements to the control unit; and the interface unit is adapted to transmit interaction information between the decoding unit and the control unit. By the scheme, all syntax elements in the CABAC decoding are decoded with hardware and decoding efficiency is improved greatly, therefore requirements on video processing speed and data processing capacity for real-time and high definition applications are satisfied.