Cache Access Deskew for Region-Specific Replacement Policies

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Solution Overview

Problem

The Least Recently Used (LRU) replacement scheme in cache management often fails to align with memory access patterns, leading to inefficient cache utilization due to skewed memory access metrics between different cache regions.

Innovation Solution

Implement a cache controller that deskews access measurements by comparing the number of accesses to different cache regions, adjusting weights, and applying different cache replacement policies based on performance metrics to optimize cache efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If LRU replacement scheme is used, then cache management is simple, but cache efficiency deteriorates due to mismatch with memory access patterns

Engineering Contradiction:
Improvecache management simplicityVSAvoidmemory access efficiency
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The cache is divided into multiple regions, each with its own access counter and replacement policy. The cache controller segments the cache management task by maintaining separate access metrics for each region, allowing independent evaluation and policy application per region based on local access patterns.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The replacement policy dynamically adapts by selecting different policies for different cache regions based on monitored access patterns. The system transitions from a static LRU policy to a dynamic policy selection mechanism that adjusts to local access characteristics in each cache region.

Inventive Principle:
Principle #15Dynamics

2Device complexity

If uniform cache replacement policy is applied, then device complexity is low, but measurement precision deteriorates due to skewed access metrics between regions

Engineering Contradiction:
Improvecache controller complexityVSAvoidaccess metric accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The cache controller is segmented into multiple independent evaluation modules, each responsible for one cache region. Each module maintains its own access counter and evaluates replacement candidates independently, preventing skew from other regions from affecting local measurement accuracy.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each cache region is treated with local quality by applying region-specific access counters and replacement policies. The access metrics are localized to each region, ensuring that the measurement precision reflects actual local access patterns rather than being distorted by global cache behavior.

Inventive Principle:
Principle #3Local quality

3Ease of operation

If cache regions are managed uniformly, then ease of operation is maintained, but cache efficiency worsens due to non-representative access patterns in certain regions

Engineering Contradiction:
Improvecache policy managementVSAvoidcache hit rate
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The cache management system is segmented into region-specific evaluators that independently assess access patterns and select replacement policies for each region. This segmentation allows the system to handle non-representative access patterns in specific regions without compromising overall cache efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system changes parameters by applying different replacement policies to different cache regions based on their access characteristics. By adjusting the replacement policy parameter locally for each region, the system optimizes cache hit rate while maintaining manageable complexity through automated policy selection.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP4052133B1Cache access measurement deskew
Publication Date: 2025.09.24 ADVANCED MICRO DEVICES INC
  • EP4052133B1 patent drawingFigure 1
  • EP4052133B1 patent drawingFigure 2~3
  • EP4052133B1 patent drawingFigure 4~5

AI summary

A processor [101] includes a cache [110] having two or more test regions [115, 116] and a larger non-test region [118]. The processor further includes a cache controller [105] that applies different cache replacement policies [111, 112] to the different test regions of the cache, and a performance monitor [104] that measures performance metrics for the different test regions, such as a cache hit rate at each test region. Based on the performance metrics, the cache controller selects a cache replacement policy for the non-test region, such as selecting the replacement policy associated with the test region having the better performance metrics among the different test regions. The processor deskews the memory access measurements in response to a difference in the amount of accesses to the different test regions exceeding a threshold.