Cache Allocation for Controller Boards via IO Metadata
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Solution Overview
Problem
In storage systems, it is difficult to predict which paths multipath input-output (MPIO) drivers will utilize for input-output operations, leading to inefficiencies in buffer allocation and increased response times due to over-allocation of resources and potential contentions.
Innovation Solution
The storage array employs a metadata structure to track previous input-output operations, using principal component analysis (PCA) to predict the likelihood of future operations and allocate buffers efficiently to the most likely controller boards, thereby optimizing cache slot sizes and reducing binding costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If buffers are over-allocated to all controller boards to ensure availability, then reliability of IO operations is improved, but device complexity and resource waste increase
Solution Approach 1:
The system performs preliminary actions by analyzing historical IO operation data before actual IO operations occur. The metadata structure pre-stores information about which controller boards have serviced which tracks, enabling the system to predict future IO patterns and pre-allocate buffers to the most likely candidate controller boards, thus ensuring availability without over-allocation to all boards
Solution Approach 2:
The system implements feedback mechanisms by continuously monitoring and recording actual IO operation paths in the metadata structure. This feedback information is then used to refine predictions about future IO patterns, allowing the buffer allocation system to adapt and improve its accuracy over time, allocating buffers more efficiently to the right controller boards
2Reliability
If buffers are allocated to multiple controller boards, then reliability of servicing IO operations is improved, but response time increases due to allocation overhead and contentions
Solution Approach 1:
By performing preliminary analysis of historical IO patterns and pre-determining the most likely candidate controller boards before IO operations occur, the system eliminates the need for time-consuming runtime buffer allocation decisions. Buffers are pre-positioned on the predicted target controller boards, significantly reducing response time while maintaining reliable servicing capability
Solution Approach 2:
The invention extracts the buffer allocation decision-making process from the runtime IO operation handling path. By separating the prediction and buffer allocation functions into a preliminary analysis phase using historical metadata, the system removes the allocation overhead from the critical IO servicing path, thereby reducing response time
3Adaptability or versatility
If cache resources are distributed across all controller boards, then adaptability to different IO paths is improved, but productivity decreases due to resource fragmentation
Solution Approach 1:
The system applies local quality by concentrating cache resources (buffers) on specific controller boards that are predicted to handle future IO operations, rather than uniformly distributing resources across all controller boards. This localized resource allocation maintains adaptability to different IO paths while avoiding the productivity loss from resource fragmentation across the entire system
Data Source
AI summary
A metadata structure of a storage array stores metadata associated with a plurality of prior input-output operations. The metadata comprises an indication of which of the controller boards was utilized to service a prior input-output operation and an input-output size for the prior input-output operation. A given input-output operation is obtained and a target controller board and a target portion of the storage array are identified based at least in part on the given input-output operation. A given controller board is determined to have a higher likelihood of receiving a future input-output operation than at least one other controller board based at least in part on the metadata and a portion of the cache is allocated to the given controller board for storing target data associated with the given input-output operation. The target controller board utilizes the portion of the cache allocated to the given controller board to service the input-output operation.