Dynamic Cache Allocation Governor for CPU Subsystem
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Solution Overview
Problem
In computing devices with shared system caches, allocating an insufficient CPU portion can lead to increased cache misses, while indiscriminately increasing the CPU portion can reduce space for other components without significant performance improvement.
Innovation Solution
A cache allocation governor is implemented to monitor performance metrics of the system cache and CPU subsystem, adjusting the size of the CPU portion based on predefined criteria to balance performance and resource allocation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the CPU portion size is increased, then cache hit rate is improved, but space available for other components is reduced
Solution Approach 1:
The patent implements dynamic adjustment of the CPU portion size in the system cache based on runtime performance metrics. The cache allocation governor continuously monitors cache performance and adjusts the CPU portion allocation accordingly, transforming the static cache allocation into a dynamic system that adapts to changing workload requirements, thereby improving cache hit rate without permanently reducing space for other components.
Solution Approach 2:
The patent changes the parameter of CPU portion size based on performance metrics such as cache miss rate. When performance degradation is detected, the CPU portion size is increased; when performance is satisfactory, the size is reduced to free up space for other components. This parameter adjustment mechanism resolves the contradiction by making cache allocation responsive to actual performance needs rather than fixed.
2Reliability
If the CPU portion size is increased indiscriminately, then cache performance is improved, but power consumption increases
Solution Approach 1:
The patent dynamically adjusts the CPU portion size parameter based on performance metrics to achieve optimal cache performance only when necessary. By monitoring cache miss rates and other performance indicators, the system increases the CPU portion size only when performance degradation is detected, and reduces it when performance is satisfactory, thereby minimizing power consumption while maintaining acceptable cache performance.
Solution Approach 2:
The patent implements a feedback mechanism where the cache allocation governor monitors cache performance metrics and uses this information to adjust the CPU portion size. This closed-loop control ensures that the CPU portion is increased only when performance degradation is detected, avoiding unnecessary power consumption from maintaining a large CPU portion during periods of satisfactory performance.
3Reliability
If the CPU portion size is increased, then cache hit rate is improved, but space utilization efficiency decreases
Solution Approach 1:
The patent transforms static cache allocation into a dynamic system where the CPU portion size is adjusted in real-time based on performance metrics. This dynamic allocation ensures that the CPU portion occupies additional cache space only when performance degradation is detected, and releases space back to the pool for other components when performance is satisfactory, thereby maintaining high space utilization efficiency while improving cache hit rate when needed.
Solution Approach 2:
The patent changes the CPU portion size parameter dynamically based on performance metrics such as cache miss rate. When performance degradation is detected, the parameter is increased to improve cache hits; when performance is satisfactory, the parameter is reduced to maximize space utilization efficiency for other components. This parameter adjustment resolves the contradiction between cache performance and space utilization.
Data Source
AI summary
A device includes a system cache accessible to a central processing unit (CPU) sub-system. The system cache includes a CPU portion allocated to the CPU sub-system. The device also includes a cache allocation governor that is configured to obtain a performance metric associated with at least one of the system cache or the CPU sub-system. The cache allocation governor is also configured to, based on the performance metric satisfying a cache adjustment criterion, adjust a size of the CPU portion.