Transactional Memory Cache Backup Copy Allocation Tag
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Solution Overview
Problem
In data processing systems employing transactional memory, the existing techniques for managing cache structures face performance issues due to the need to replicate data in memory before writes during transactions and the subsequent requirement to refetch data upon transaction aborts, leading to increased performance impacts.
Innovation Solution
The implementation of an allocation tag mechanism that stores backup copies of data in a cache entry with a specific allocation tag state, allowing the system to invalidate cache entries upon transaction aborts without losing original data, enabling subsequent access to the initial data without re-fetching, thus reducing performance impacts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is replicated in memory before writes during transactions, then data can be restored upon transaction abort, but performance deteriorates due to additional clean operations and refetch requirements
Solution Approach 1:
The patent creates a backup copy of the cache line in a different cache entry before the transaction modifies the original. This backup copy is stored with a special allocation tag that prevents it from being accessed during the transaction. If the transaction aborts, the backup copy can be quickly restored without needing to refetch data from memory, eliminating the need for clean operations and improving both reliability and performance.
2Reliability
If cache lines are invalidated upon transaction abort, then data consistency is maintained, but performance deteriorates due to refetch operations
Solution Approach 1:
The patent performs a preliminary action by creating a backup copy of the cache line before the transaction modifies the original data. This backup copy is prepared in advance and stored with a special allocation tag. When the transaction aborts, the system can immediately restore the backup copy without needing to refetch data from memory, significantly reducing recovery time while maintaining data consistency.
3Reliability
If allocation tag state is used to control cache access, then data protection during transactions is improved, but device complexity increases
Solution Approach 1:
The patent introduces a new parameter - the allocation tag state - to control cache access. By changing the state of the allocation tag (from normal to a special protected state), the system can easily protect data during transactions without complex hardware modifications. The special allocation tag state acts as a simple flag that prevents access to the backup copy during transactions, providing data protection with minimal added complexity.
Data Source
AI summary
A technique is described for managing a cache structure in a system employing transactional memory. The apparatus comprises processing circuitry to perform data processing operations in response to instructions, the processing circuitry comprising transactional memory support circuitry to support execution of a transaction, and a cache structure comprising a plurality of cache entries for storing data for access by the processing circuitry. Each cache entry has associated therewith an allocation tag, and allocation tag control circuitry is provided to control use of a plurality of allocation tags and to maintain an indication of a current state of each of those allocation tags. The transactional memory support circuitry is arranged, when initial data in a chosen cache entry is to be written to during the transaction, to cause a backup copy of the initial data to be stored in a further cache entry and to cause the allocation tag control circuitry to associate with that further cache entry a selected allocation tag selected for the transaction. The current state of that selected allocation tag is updated to a first state which prevents the processing circuitry from accessing that further cache entry. In the event that the transaction is aborted prior to reaching a transaction end point, the transactional memory support circuitry causes the chosen cache entry to be invalidated, and the allocation tag control circuitry changes the state of the selected allocation tag to a second state that allows the processing circuitry to access the further cache entry. As a result, this enables a hit to subsequently be detected within the cache structure for the initial data without a requirement to refetch the initial data into the cache structure. This can give rise to significant performance enhancements.