Cache Address Determination via Bank Segmentation

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Solution Overview

Problem

As cache memories grow larger, existing systems face challenges in quickly and efficiently determining next available addresses for writing data, leading to inefficiencies in data fetching and potential performance penalties, especially in set-associative cache organizations with high associativity.

Innovation Solution

A method and system where a cache memory is divided into multiple banks, each with a local control unit employing a different address determination algorithm to determine candidate addresses, and a global controller using a distinct address selection algorithm to choose the next available address, allowing parallel operation and independent decision-making within each bank.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a single controller determines cache addresses sequentially, then the control logic is simple, but the address determination becomes a bottleneck for large cache memories

Engineering Contradiction:
Improveaddress determination speedVSAvoidcontroller structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The cache memory is divided into multiple banks, each with its own local control unit that independently determines candidate addresses using address determination algorithms. This segmentation distributes the address determination workload, enabling parallel processing and improving productivity while maintaining manageable complexity at each local unit.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system transitions from a single-dimensional sequential control approach to a multi-dimensional parallel architecture. Local control units operate independently in parallel across multiple banks, and the global controller coordinates their outputs, adding a new dimension of parallelism to the address determination process.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If cache memory size increases, then storage capacity improves, but address determination efficiency deteriorates

Engineering Contradiction:
Improvecache memory capacityVSAvoiddata fetching speed
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

By dividing the large cache memory into multiple banks with independent local control units, the system maintains efficient address determination even as total capacity increases. Each bank processes address determination independently in parallel, preventing the address determination bottleneck that would occur with a single controller managing a large cache.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The global controller acts as an intermediary that receives candidate addresses from multiple local control units and selects the final address using an address selection function. This intermediary coordinates the parallel operations of local units, enabling the system to handle large cache capacities while maintaining high data fetching speed.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If all banks use the same address determination algorithm, then implementation is simple, but address selection flexibility is limited

Engineering Contradiction:
Improveaddress selection flexibilityVSAvoidalgorithm diversity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

Each local control unit is configured with its own address determination algorithm, allowing different banks to use different algorithms optimized for their specific access patterns. This local customization provides adaptability and versatility in address selection while keeping each individual unit relatively simple.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system supports multiple address determination algorithms across different banks, making the overall cache system universally adaptable to various workloads. The global controller's address selection function can choose from diverse candidate addresses generated by different algorithms, providing multi-functionality and flexibility.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8756362B1Methods and systems for determining a cache address
Publication Date: 2014.06.17 MARVELL ISRAEL (M L S L) LTD
  • US8756362B1 patent drawing
  • US8756362B1 patent drawing
  • US8756362B1 patent drawing

AI summary

A method and system are provided for determining a next available address for writing data to a cache memory. In one implementation, a method includes receiving a request for a candidate address in the cache memory, the cache memory divided into a plurality of banks. The method further includes determining a candidate address in each of the cache memory banks using an address determination algorithm, selecting one of the candidate addresses from among the determined candidate addresses using an address selection function different from the address determination algorithm, and returning the selected candidate address in response to the request.