Pattern-Based Cache Block Compression With Lower Hardware Overhead
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Solution Overview
Problem
Existing cache block compression techniques are inefficient and incur high hardware overhead, failing to achieve performance close to ideal compression while maintaining manageable hardware complexity.
Innovation Solution
A pattern-based approach for cache block compression that identifies and utilizes specific byte patterns in cache blocks to generate a compressed representation, using a byte dictionary and metadata to reconstruct the original cache block, thereby reducing hardware complexity and improving efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional cache block compression techniques are used, then compression is achieved, but hardware overhead is high and complexity increases
Solution Approach 1:
The patent segments the cache block into multiple segments and identifies redundant patterns within each segment. By dividing the compression task into manageable segments with dedicated hardware circuits, the system achieves high compression ratios without requiring a monolithic complex compressor, thus reducing overall hardware overhead while maintaining effectiveness
Solution Approach 2:
The patent pre-identifies common patterns and redundant data structures in cache blocks before compression occurs. By preparing pattern matching tables and redundancy information in advance, the compression process becomes simpler and requires less complex runtime hardware logic, resolving the contradiction between compression effectiveness and hardware complexity
2Quantity of substance
If compression is applied to increase cache capacity, then more data can be stored, but access time and energy consumption increase
Solution Approach 1:
The patent performs preliminary pattern identification and prepares compression mappings before data is actually compressed or accessed. This pre-computation allows the decompression process to proceed quickly using pre-prepared lookup tables, thereby increasing effective cache capacity without significantly increasing access time
Solution Approach 2:
The patent creates compact representations (copies) of redundant data patterns that can be quickly referenced during decompression. Instead of storing full redundant data, it stores compressed pattern copies that can be rapidly expanded, thus increasing cache capacity while maintaining fast access through efficient copy-based reconstruction
3Quantity of substance
If complex compression algorithms are used to approach ideal compression, then compression ratio improves, but hardware complexity becomes unmanageable
Solution Approach 1:
The patent divides the complex compression problem into smaller segment-level compression tasks. Each segment uses simplified hardware circuits to identify and compress local patterns, achieving near-ideal compression through cumulative segment compression without requiring a single complex algorithm, thus maintaining manageable hardware complexity
Solution Approach 2:
The patent applies compression selectively to only those portions of cache blocks that contain redundant patterns, rather than attempting to compress entire blocks uniformly. This partial action approach achieves high effective compression ratios by focusing computational resources on compressible portions while leaving already-compressed or non-compressible portions unchanged, avoiding unnecessary hardware complexity
Data Source
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AI summary
Systems, methods, and devices for performing pattern-based cache block compression and decompression. An uncompressed cache block is input to the compressor. Byte values are identified within the uncompressed cache block. A cache block pattern is searched for in a set of cache block patterns based on the byte values. A compressed cache block is output based on the byte values and the cache block pattern. A compressed cache block is input to the decompressor. A cache block pattern is identified based on metadata of the cache block. The cache block pattern is applied to a byte dictionary of the cache block. An uncompressed cache block is output based on the cache block pattern and the byte dictionary. A subset of cache block patterns is determined from a training cache trace based on a set of compressed sizes and a target number of patterns for each size.