Memory Cache Channel Access for Non-Sequential Data Operands
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Solution Overview
Problem
Current computer systems face performance and power inefficiencies when accessing non-sequential data operands, particularly in high-performance computing systems that use vector data structures, due to the need to read and write entire cache blocks even when only one operand is used, leading to excessive memory bandwidth and power consumption.
Innovation Solution
A method for accessing and writing data operands in a memory unit with independently controlled channels, utilizing a memory cache and tag store to compare physical addresses, allowing selective reading and writing of blocks, reducing unnecessary reads and writes by exploiting locality and vector references.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If entire cache blocks are read to access a single operand, then the operand can be retrieved, but memory bandwidth and power are excessively consumed
Solution Approach 1:
The cache block is segmented into multiple independently accessible channels. Instead of reading the entire cache block, the system selectively activates only the specific channel containing the required operand, thereby reducing memory bandwidth consumption and power usage while maintaining accurate operand retrieval.
2Measurement precision
If entire cache blocks are read to access a single operand, then the operand can be retrieved, but memory access time increases due to unnecessary data transfer
Solution Approach 1:
The cache block is divided into multiple channels that can be independently accessed. The system directly targets and reads only the specific channel containing the required operand, eliminating the time penalty of transferring unnecessary data from other channels while ensuring accurate operand retrieval.
Solution Approach 2:
The system performs preliminary identification of the operand's location within the cache block before initiating the read operation. By knowing in advance which channel contains the required operand, the system can directly access that channel without first reading the entire block, thereby reducing memory access time.
3Ease of operation
If sequential access methods are used, then implementation is simple, but performance is severely impacted for non-sequential references
Solution Approach 1:
The system dynamically adapts its access method based on the reference pattern. For sequential references, it uses simple sequential access; for non-sequential references, it employs the channel-selective access mechanism. This dynamic adaptation maintains ease of operation for common cases while significantly improving performance for vector and non-sequential access patterns.
Data Source
AI summary
The present invention relates to a method for storing and accessing an operand in a memory unit of a computer, and specifically, to a method for accessing a data operand stored in a main memory unit with N independently controlled channels a memory cache and a tag store, wherein the method comprises the steps of comparing a physical address with the tag store, the cache tags comprising N status bits, referencing the channels, and a method for writing a data operand in a main memory unit with N independently controlled channels.