Cache Coherence Directory Footprint Reduction via Selective Eviction

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Solution Overview

Problem

Cache coherence directories in processing systems face oversubscription issues due to limited size, leading to increased latency and power consumption when evicting cache pages, as conventional solutions like increasing directory size or cache page size are impractical.

Innovation Solution

Implementing selective cacheline eviction processes that preferentially evict cachelines from sparse cache pages over dense ones, reducing the footprint of the cache coherence directory and alleviating oversubscription by deallocating page entries from sparse pages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the size of the cache coherence directory is increased to reduce oversubscription and recall frequency, then the directory can track more cache pages, but die size and power consumption increase

Engineering Contradiction:
Improvecache coherence directory capacityVSAvoiddie size
Core Design Contradiction:
ReliabilityVSWeight of stationary object

Solution Approach 1:

The patent segments the cache page tracking into two parts: a compressed cache page directory that tracks only densely-used cache pages, and a fallback mechanism that handles sparse cache pages by allocating individual cacheline entries in the L2 cache. This segmentation allows the system to reduce the directory size while maintaining the ability to track all necessary cache pages.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the parameter of cache page tracking from a fixed page-based approach to a dynamic approach that adapts to cache usage patterns. By monitoring cache access patterns and identifying densely-used versus sparse cache pages, the system dynamically adjusts which pages are tracked in the compressed directory versus handled through individual cacheline entries.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the size of the cache coherence directory is increased to reduce oversubscription and recall frequency, then the directory can track more cache pages, but power consumption increases

Engineering Contradiction:
Improvecache coherence directory capacityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The patent segments the cache page tracking into two parts: a compressed cache page directory that tracks only densely-used cache pages, and a fallback mechanism that handles sparse cache pages by allocating individual cacheline entries in the L2 cache. This segmentation allows the system to reduce the directory size while maintaining the ability to track all necessary cache pages.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the parameter of cache page tracking from a fixed page-based approach to a dynamic approach that adapts to cache usage patterns. By monitoring cache access patterns and identifying densely-used versus sparse cache pages, the system dynamically adjusts which pages are tracked in the compressed directory versus handled through individual cacheline entries.

Inventive Principle:
Principle #35Parameter changes

3Weight of stationary object

If the cache page size is increased to reduce the number of directory entries, then the directory footprint is reduced, but the likelihood of oversubscription increases when workloads use few cachelines per page

Engineering Contradiction:
Improvedirectory footprintVSAvoidoversubscription risk
Core Design Contradiction:
Weight of stationary objectVSReliability

Solution Approach 1:

The patent changes the parameter of cache page tracking from a fixed page-based approach to a dynamic approach that adapts to cache usage patterns. By monitoring cache access patterns and identifying densely-used versus sparse cache pages, the system dynamically adjusts which pages are tracked in the compressed directory versus handled through individual cacheline entries.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces dynamic behavior to the cache coherence directory by continuously monitoring cache access patterns and adapting the tracking strategy. The system dynamically identifies densely-used cache pages for compressed directory tracking and handles sparse pages through individual cacheline entries, allowing the directory to adapt to changing workload characteristics.

Inventive Principle:
Principle #15Dynamics

4Reliability

If selective eviction of sparse cache pages is implemented to reduce directory footprint, then oversubscription frequency decreases, but cache replacement complexity increases

Engineering Contradiction:
Improvedirectory oversubscription frequencyVSAvoidcache replacement algorithm complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the parameter of cache page tracking from a fixed page-based approach to a dynamic approach that adapts to cache usage patterns. By monitoring cache access patterns and identifying densely-used versus sparse cache pages, the system dynamically adjusts which pages are tracked in the compressed directory versus handled through individual cacheline entries.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20190163632A1Reducing cache footprint in cache coherence directory
Publication Date: 2019.05.30 ADVANCED MICRO DEVICES INC
  • US20190163632A1 patent drawing
  • US20190163632A1 patent drawing
  • US20190163632A1 patent drawing

AI summary

A method includes monitoring, at a cache coherence directory, states of cachelines stored in a cache hierarchy of a data processing system using a plurality of entries of the cache coherence directory. Each entry of the cache coherence directory is associated with a corresponding cache page of a plurality of cache pages, and each cache page representing a corresponding set of contiguous cachelines. The method further includes selectively evicting cachelines from a first cache of the cache hierarchy based on cacheline utilization densities of cache pages represented by the corresponding entries of the plurality of entries of the cache coherence directory.