Cache Coherency Crossing Detection Circuit
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Solution Overview
Problem
Current processing systems face challenges in reducing power consumption while maintaining cache coherency, as existing methods either increase circuit size or require additional components like replace buffers.
Innovation Solution
The implementation of a processing system with a determination unit and response information generation unit in cache memory to detect and respond to request crossings, using crossing information to manage cache coherency without a replace buffer, thereby reducing circuit size and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a replace buffer is added to maintain cache coherency, then cache coherency reliability is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent extracts the replace buffer component from the cache coherency system and replaces it with a crossing detection mechanism. The determination unit detects request crossings by monitoring timing relationships between access requests and write-back operations, eliminating the need for additional buffer hardware while maintaining coherency reliability.
Solution Approach 2:
The patent introduces crossing information as an intermediary signal that mediates between the access request and the cache memory response. This crossing information, generated by the determination unit, enables the system to handle request crossings without requiring a replace buffer, thus reducing device complexity while maintaining reliability.
2Reliability
If a replace buffer is added to maintain cache coherency, then cache coherency reliability is improved, but power consumption increases
Solution Approach 1:
The patent removes the power-consuming replace buffer component and replaces it with a determination unit that detects request crossings through timing analysis. This extraction eliminates the continuous power consumption associated with buffer maintenance while preserving cache coherency through intelligent request handling.
Solution Approach 2:
The determination unit performs self-service by autonomously detecting request crossings and generating crossing information without requiring additional power-intensive hardware. The system uses existing timing signals and control logic to identify crossings, enabling coherency maintenance with minimal additional power consumption.
3Reliability
If traditional cache coherency methods are used, then cache coherency is maintained, but circuit size increases
Solution Approach 1:
The patent changes the operational parameters of the cache memory by introducing crossing detection based on timing relationships. Instead of using spatial expansion (replace buffers), the system uses temporal analysis of access requests and write-back operations to detect crossings, maintaining coherency without increasing circuit area.
Solution Approach 2:
The determination unit performs multiple functions: it monitors access requests, tracks write-back operations, detects request crossings, and generates crossing information. This multi-functional approach replaces the dedicated replace buffer, reducing circuit size while maintaining cache coherency through intelligent request handling.
Data Source
AI summary
A processing device includes multiple processing units and multiple memory devices respectively assigned to the multiple processing units. Each of the multiple processing units includes a cache memory configured to retain data stored in the memory device assigned to itself, and fetched data taken out from the memory device of the processing unit other than itself. When an access request for the fetched data is received from a source processing unit from which the fetched data has been taken out, the cache memory determines occurrence of a crossing in which the access request is received after the cache memory issues write back information instructing to write back the fetched data to the memory device assigned to the source processing unit. If the crossing has occurred, crossing information indicating that the crossing has occurred is output as a response to the access request.