Inter-device Cache Coherency via Directory Tracking
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Solution Overview
Problem
In inter-device processing systems, maintaining cache coherency across devices is labor-intensive and leads to excessive bus traffic due to the need for programmers to manually track data locations and transfer entire pages of data, even when only a few cache lines need to be updated.
Innovation Solution
The system employs a coherence directory to determine if any device has a valid cache line for requested data, allowing for targeted fetch commands to be sent to the home device for non-cache memory data, reducing bus traffic by transferring only the necessary cache line and automating cache coherency updates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the PCIe protocol is used for inter-device data transfer, then data coherency can be maintained through manual tracking of valid data locations, but programming complexity increases and bus traffic becomes excessive when transferring entire pages of data
Solution Approach 1:
The patent introduces a coherence directory as an intermediary data structure that automatically tracks the locations of valid cache lines across devices. This mediator eliminates the need for programmers to manually track valid data locations, reducing programming complexity while maintaining data coherency through automated directory management.
Solution Approach 2:
The coherence directory enables the system to automatically manage cache coherency without programmer intervention. When a device needs data, the coherence directory automatically determines which device holds the valid copy and facilitates the transfer, making the system self-managing regarding coherence maintenance.
2Reliability
If entire pages of data (64 cache lines) are transferred between devices, then data coherency is maintained, but bus traffic increases excessively when only a few cache lines need to be transferred
Solution Approach 1:
The patent segments data transfers at the cache line level rather than requiring entire page transfers. The coherence directory enables targeted transfer of only the specific cache lines that need to be moved, reducing bus traffic and energy consumption while maintaining coherency for the accessed data.
Solution Approach 2:
Instead of transferring the entire page (64 cache lines) when only a few cache lines are needed, the system performs partial transfers by moving only the necessary cache lines. This partial action approach reduces unnecessary bus traffic and energy consumption while still achieving the required data coherency.
Data Source
AI summary
The devices within an inter-device processing system maintain data coherency in the last level caches of the system as a cache line of data is shared between the devices by utilizing a directory in one of the devices that tracks the coherency protocol states of the memory addresses in the last level caches of the system.