Cache Coherency Shared Invalid State for SMP Latency Reduction
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Solution Overview
Problem
In symmetric multiprocessor (SMP) computer systems, the existing cache coherency protocols lead to unnecessary local broadcasts, increasing latency and bandwidth usage due to delayed requests for data not found in the local node, as they always check the local node first before broadcasting to remote nodes.
Innovation Solution
A new cache coherency protocol state, 'shared invalid' (Isn), is introduced to predict whether a read request can be satisfied within a local node, allowing read requests to be broadcast first to remote nodes if the data is predicted to be there, thereby reducing unnecessary local broadcasts and conserving bandwidth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If read requests are always broadcast first to local nodes, then local data access is prioritized, but unnecessary local broadcasts increase latency and bandwidth usage when data is located in remote nodes
Solution Approach 1:
The system performs preliminary actions by setting cache state bits (such as the shared invalid bit) in advance to indicate whether data is likely to be found in local or remote nodes. This preliminary information is used to determine the broadcast strategy before the actual read request is issued, avoiding unnecessary local broadcasts when data is predicted to be in remote nodes.
Solution Approach 2:
The broadcast strategy is made dynamic by transitioning between different cache coherency states (MESI states plus shared invalid state) based on predicted data location. The system adapts its behavior by selecting different broadcast paths (local-first vs. remote-first) depending on the current cache state, rather than following a fixed broadcast sequence.
2Reliability
If read requests are always broadcast first to local nodes, then local node checking is ensured, but local communications bandwidth is consumed unnecessarily when data is in remote nodes
Solution Approach 1:
Cache state bits are set in advance based on previous write operations and data location predictions. This preliminary state information allows the system to skip unnecessary local broadcasts, conserving bandwidth energy when data is predicted to reside in remote nodes.
Solution Approach 2:
The system changes the parameter of broadcast destination selection by using cache state bits (such as the shared invalid bit) to determine whether to broadcast to local nodes, remote nodes, or both. This parameter change enables selective broadcasting that adapts to the predicted data location, reducing unnecessary bandwidth consumption.
3Loss of energy
If a two-level cache coherence protocol is used with local-first broadcasting, then global bandwidth is conserved for common cases, but access latency increases when data is not in local nodes
Solution Approach 1:
The system performs preliminary prediction using cache state bits to determine the likely location of data before issuing read requests. When the shared invalid bit indicates data is in remote nodes, the system proactively broadcasts to remote nodes first, avoiding the latency penalty of unsuccessful local broadcasts while maintaining global bandwidth conservation for cases where data is locally cached.
Solution Approach 2:
The traditional local-first broadcast sequence is inverted to remote-first broadcast when cache state bits predict data location in remote nodes. This inversion resolves the contradiction by adapting the broadcast sequence to the predicted data location, reducing latency for remote data while maintaining the two-level protocol's bandwidth efficiency.
Data Source
AI summary
A method, apparatus, and computer program product are disclosed for reducing the number of unnecessarily broadcast local requests to reduce the latency to access data from remote nodes in an SMP computer system. A shared invalid cache coherency protocol state is declined that predicts whether a memory read request to read data in a shared cache line can be satisfied within a local node. When a cache line is in the shared invalid state, a valid copy of the data is predicted to be located in the local node. When a cache line is in the invalid state and not in the shared invalid state, a valid copy of the data is predicted to be located in one of the remote nodes. Memory read requests to read data in a cache line that is not currently in tile shared invalid state are broadcast first to remote nodes. Memory read requests to read data in a cache line that is currently in the shared invalid state are broadcast first to a local node, and in response to being unable to satisfy the memory read requests within the local node, the memory read requests are broadcast to the remote nodes.