Cache-Controlled Command Access for Power-Saving Loop Execution

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Solution Overview

Problem

Existing electronic apparatuses face inefficiencies in power-saving methods when accessing commands from memory, particularly when the command buffer capacity is exceeded, leading to unnecessary re-access from the original source and increased power consumption.

Innovation Solution

The apparatus categorizes loop commands into a first part matching the command buffer capacity and a second part exceeding it, storing only the first part in the buffer and retrieving the second part from the source during each loop procedure to optimize power usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If all loop commands are stored in the command buffer circuit, then the access speed is improved, but the device complexity and power consumption increase due to larger buffer requirements

Engineering Contradiction:
Improvecommand access speedVSAvoidbuffer circuit complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The loop commands are divided into two segments: commands that fit within the buffer capacity and commands that exceed it. The cache control circuit identifies loop commands and splits them appropriately, storing only the portion that fits in the buffer while managing the remainder through selective re-fetching from the command source.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of storing all loop commands in the buffer, the system stores only the necessary portion (first part) that fits within the buffer capacity. The cache control circuit manages partial storage and selectively re-fetches only the needed portions during loop execution, avoiding the overhead of storing and managing excessive commands.

Inventive Principle:
Principle #16Partial or excessive action

2Loss of energy

If the command buffer capacity is increased to store all loop commands, then the power consumption is reduced by avoiding re-access, but the device complexity and initial power cost increase

Engineering Contradiction:
Improvepower consumption during loop executionVSAvoidbuffer capacity requirements
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The system dynamically adjusts command retrieval strategy based on buffer capacity constraints. The cache control circuit monitors buffer status and adaptively decides whether to fetch commands from the buffer or re-fetch from the command source, optimizing power consumption without requiring excessive buffer capacity.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the operational parameters of command access by switching between two modes: retrieving commands from the buffer when available and re-fetching from the command source when needed. This parameter switching optimizes power consumption while avoiding the need for large buffer capacity.

Inventive Principle:
Principle #35Parameter changes

3Loss of energy

If the cache control circuit selectively manages what to store in the buffer, then the power saving is improved, but the control complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoidcache control circuit complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The cache control circuit employs feedback mechanisms to monitor buffer capacity status and command execution state. Based on this feedback, the circuit intelligently decides whether to store commands in the buffer or retrieve them directly from the command source, optimizing power consumption while maintaining manageable control complexity through systematic decision-making.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12405892B2Electronic apparatus and command accessing method thereof having power saving mechanism
Publication Date: 2025.09.02 REALTEK SEMICON CORP
  • US12405892B2 patent drawing
  • US12405892B2 patent drawing
  • US12405892B2 patent drawing

AI summary

The present disclosure discloses a command accessing method having power saving mechanism is provided that includes steps outlined below. A cache control circuit is controlled to retrieve a plurality of commands from a command source to be executed. A plurality of loop commands corresponding to a loop procedure included in the commands are determined, wherein the loop commands include a first part that matches a storage amount of a command buffer circuit and a second part that exceeds the storage amount. The cache control circuit is controlled to store the first part of the loop commands to the command buffer circuit and not store the second part of the loop commands to the command buffer circuit. The cache control circuit is controlled to, every time the loop procedure is performed, retrieve and execute the first part of the loop commands from the command buffer circuit and retrieve and execute the second part of the loop commands from the command source.