Cache Control Register Bypassing Unnecessary Lookups

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In data processing, existing systems waste time and resources by always checking the cache for data access, even when it's known that the data cannot be there, leading to inefficiencies in execution time and power consumption.

Innovation Solution

A control register is used to determine whether to look for data in a cache or not, based on a predetermined value, allowing the processor to skip the cache lookup when data is known to be absent, thereby optimizing memory access by eliminating unnecessary cache checks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the processor always checks the cache for data access, then cache hit detection may improve data access speed, but execution time increases due to unnecessary cache lookups when data is known to be absent

Engineering Contradiction:
Improvedata access speedVSAvoidexecution time
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The system performs preliminary action by setting the cache control value in advance to indicate whether cache is enabled before data access operations occur. This allows the data accessing logic to skip unnecessary cache lookups when the control value indicates cache is disabled or data is known to be absent, thereby reducing execution time while maintaining the ability to perform cache lookups when beneficial

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements dynamics by making the cache lookup behavior conditional rather than static. The cache control value can be dynamically set to different states (enabled/disabled) based on whether data is expected to be in the cache, allowing the system to adapt its data access strategy to different operational contexts and optimize between cache lookup and direct memory access

Inventive Principle:
Principle #15Dynamics

2Reliability

If the processor performs cache lookup for every data access, then cache functionality is maintained, but power consumption increases due to unnecessary cache access operations

Engineering Contradiction:
Improvecache functionalityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The system performs preliminary action by pre-setting the cache control value to reflect the actual cache state or data presence probability before data access operations. This allows the system to avoid activating the cache lookup mechanism when it would be futile, thereby reducing power consumption while ensuring cache functionality is properly utilized when data is actually present in the cache

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system extracts the unnecessary cache lookup operations by using the cache control value to selectively disable cache access when data is known to be absent. This separates the useful cache functionality (when data is present) from the wasteful operations (when data is absent), eliminating only the harmful portion while preserving the beneficial cache acceleration when applicable

Inventive Principle:
Principle #2Taking out (Extraction)

3Productivity

If the processor looks for data in cache first before external memory, then data access performance is improved for cached data, but device complexity increases due to additional cache control logic

Engineering Contradiction:
Improvedata access performanceVSAvoidcache control logic
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The cache control register serves multiple functions: it controls cache enablement, indicates data presence probability, and guides data accessing logic behavior. This multi-functionality allows a single control mechanism to manage both cache operations and data access strategy, reducing overall device complexity compared to having separate control logic for each function

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8250309B2Control of data accesses to a cache in data processing
Publication Date: 2012.08.21 ARM LTD
  • US8250309B2 patent drawing
  • US8250309B2 patent drawing
  • US8250309B2 patent drawing

AI summary

A data processor comprising: a control register operable to store a cache control value; and data accessing logic responsive to a data access instruction and to said cache control value to look for data to be accessed in a cache if said cache control value has a predetermined value and not to look for said data to be accessed in said cache if said cache control value does not have said predetermined value.