Cache Control Circuitry Lookup Hint Activation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In data processing systems with multiple cache levels, there is a challenge in balancing cache capacity and performance, as larger caches lead to increased latency, and unnecessary second-level cache lookups can waste power and reduce efficiency.

Innovation Solution

Implementing a cache control circuitry that uses lookup hint information to determine whether to activate or deactivate second-level cache lookups based on predictions of valid data presence, thereby optimizing power usage and reducing unnecessary lookups.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If second-level cache lookup is always performed, then cache capacity is improved, but power consumption increases due to unnecessary lookups

Engineering Contradiction:
Improvecache capacityVSAvoidpower consumption
Core Design Contradiction:
Quantity of substanceVSUse of energy by moving object

Solution Approach 1:

The patent applies preliminary action by performing a first-level cache lookup before the second-level cache lookup. The lookup hint information from the first-level cache is used in advance to predict whether the second-level cache lookup will be necessary, allowing the system to prepare and potentially avoid the second-level lookup before it is actually needed.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies partial action by conditionally performing the second-level cache lookup only when the lookup hint information predicts a high probability of finding valid data. Instead of always performing the second-level lookup (excessive action), the system performs it partially - only when predicted to be useful - thereby reducing unnecessary power consumption while maintaining cache capacity benefits.

Inventive Principle:
Principle #16Partial or excessive action

2Use of energy by moving object

If second-level cache lookup is deactivated to save power, then power efficiency is improved, but cache performance deteriorates due to reduced capacity utilization

Engineering Contradiction:
Improvepower efficiencyVSAvoidcache performance
Core Design Contradiction:
Use of energy by moving objectVSProductivity

Solution Approach 1:

The patent applies feedback by using lookup hint information from the first-level cache to dynamically control whether the second-level cache lookup is activated. The system continuously monitors the lookup hints and adjusts the second-level cache activation state accordingly, creating a feedback loop that optimizes both power efficiency and cache performance based on actual data patterns.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent applies dynamics by making the second-level cache lookup activation dynamic rather than static. The activation state changes based on the lookup hint information, allowing the system to adapt to varying data access patterns and optimize performance and power consumption in real-time conditions.

Inventive Principle:
Principle #15Dynamics

3Quantity of substance

If larger cache is used to increase capacity, then cache capacity is improved, but access latency increases

Engineering Contradiction:
Improvecache capacityVSAvoidaccess latency
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent applies segmentation by dividing the cache system into two distinct levels: first-level cache and second-level cache. Each level serves a specific purpose - the first-level cache provides fast access for frequently used data, while the second-level cache provides additional capacity for less frequently accessed data. This segmentation allows the system to maintain high capacity while minimizing access latency for critical data.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies the nested doll principle by creating a hierarchical cache structure where the first-level cache is nested within the broader cache system that includes the second-level cache. The first-level cache acts as a smaller, faster cache that is embedded within the larger, slower second-level cache, allowing the system to benefit from both small fast memory and large slow memory characteristics.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS11379377B2Lookup hint information
Publication Date: 2022.07.05 ARM LTD
  • US11379377B2 patent drawing
  • US11379377B2 patent drawing
  • US11379377B2 patent drawing

AI summary

First and second-level caches are provided. Cache control circuitry performs a first-level cache lookup of the first-level cache based on a lookup address, to determine whether the first-level cache stores valid cached data corresponding to the lookup address. When lookup hint information associated with the lookup address is available, the cache control circuitry determines based on the lookup hint information whether to activate or deactivate a second-level cache lookup of the second-level cache. The lookup hint information is indicative of whether the second-level cache is predicted to store valid cached data associated with the lookup address. When the second-level cache lookup is activated, the second-level cache lookup of the second-level cache is performed based on the lookup address to determine whether the second-level cache stores valid cached data corresponding to the lookup address.