Cache Controller Atomic Primitive Execution Rejection
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Solution Overview
Problem
In multi-core processor systems, concurrent accesses to shared resources can lead to unexpected or erroneous behavior, necessitating better control over atomic primitives to manage resource usage efficiently.
Innovation Solution
A method where a data item is exclusively assigned to a first processor core for executing an atomic primitive, with a cache controller managing multiple data states to determine if the execution is complete, and returning a rejection message to other processor cores until the primitive is finished, allowing other cores to perform tasks concurrently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a data item is exclusively assigned to a first processor core for executing an atomic primitive, then data consistency and reliability are improved, but other processor cores must wait for the completion of the atomic primitive, reducing system productivity
Solution Approach 1:
The patent introduces a cache controller as an intermediary between processor cores and the data item. The cache controller monitors the execution state of the atomic primitive and manages access requests from multiple cores. When the first core is executing the atomic primitive, the cache controller intercepts requests from other cores and returns rejection messages, preventing them from accessing the data item. This intermediary mechanism maintains data consistency without requiring other cores to continuously poll or wait actively, thereby preserving system productivity.
2Reliability
If processor cores continuously check for completion of an atomic primitive, then access control reliability is improved, but energy consumption and processing overhead increase
Solution Approach 1:
The cache controller automatically monitors the execution state of the atomic primitive and proactively manages access requests without requiring processor cores to continuously poll. When a request is received, the cache controller自行 checks whether the atomic primitive is complete and makes the access decision, eliminating the need for cores to repeatedly query the execution status. This self-service approach reduces energy consumption and processing overhead while maintaining reliable access control.
3Ease of operation
If a cache protocol with multiple data states is implemented, then precise control over data access is improved, but device complexity increases
Solution Approach 1:
The cache controller implements a state machine with distinct states (e.g., exclusive state, shared state, invalid state) to track the data item's access status. Each state has well-defined transition rules and associated actions. This segmentation of the control logic into discrete states simplifies the overall operation: the cache controller only needs to track which state the data item is in and execute the corresponding predefined actions, making the complex state management tractable and easier to operate.
Data Source
AI summary
The present disclosure relates to a method for a computer system comprising a plurality of processor cores, including a first processor core and a second processor core, wherein a cached data item is assigned to a first processor core, of the plurality of processor cores, for exclusively executing an atomic primitive. The method includes receiving, from a second processor core at a cache controller, a request for accessing the data item, and in response to determining that the execution of the atomic primitive is not completed by the first processor core, returning a rejection message to the second processor core.