Cache Controller Eviction Policy Based on Read Data Size
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Solution Overview
Problem
Current semiconductor memory devices face inefficiencies in cache management, particularly in determining eviction policies for cache data, which affects read performance and memory system efficiency.
Innovation Solution
A controller is introduced that includes a cache buffer and a cache controller, which analyzes read requests to determine an eviction policy based on the size of the read data, using algorithms like LRU and cache-used count to efficiently manage cache data and improve read performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a fixed eviction policy is used for cache data, then the cache management is simple, but the read performance deteriorates due to unnecessary data eviction
Solution Approach 1:
The patent applies dynamics by making the eviction policy adaptive rather than fixed. The controller dynamically selects between different eviction algorithms (LRU and cache-used count) based on the characteristics of the incoming read request, specifically whether it is a sequential or random access pattern. This dynamic adaptation optimizes read performance by matching the eviction strategy to the access pattern, preventing unnecessary data eviction while maintaining manageable complexity.
2Quantity of substance
If cache data is evicted without analyzing read request characteristics, then the cache buffer is efficiently utilized, but read performance deteriorates due to premature eviction of frequently accessed data
Solution Approach 1:
The patent applies parameter changes by modifying the eviction decision based on the access pattern parameter. When a sequential access pattern is detected, the controller uses LRU eviction; when a random access pattern is detected, it uses cache-used count eviction. This parameter-based adaptation ensures that data is evicted based on actual usage patterns rather than arbitrary criteria, maintaining optimal cache buffer utilization while preventing premature eviction of frequently accessed data.
3Device complexity
If the controller uses a simple eviction policy, then the control logic is simple, but the memory system efficiency deteriorates due to suboptimal cache usage
Solution Approach 1:
The patent applies self-service by enabling the controller to automatically analyze read request characteristics and select the appropriate eviction policy without external intervention. The request analyzer independently examines each read request, determines whether it is sequential or random access, and triggers the corresponding eviction algorithm. This self-service mechanism maintains relatively simple control logic while significantly improving memory system efficiency through adaptive cache management.
Data Source
AI summary
A controller controls an operation of a semiconductor memory device. The controller includes a cache buffer, a request analyzer, and a cache controller. The cache buffer stores multiple cache data. The request analyzer generates request information including information on a size of read data to be read. The cache controller determines an eviction policy of the multiple cache data, based on the size of the read data in the request information.