Cache Controller Priority Slot Allocation for Storage Response
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Solution Overview
Problem
Conventional storage control devices improve Quality of Service (QoS) by prioritizing commands, but the response time for high-priority read commands increases when data is not in the cache memory, leading to deteriorated QoS.
Innovation Solution
A storage control device with a cache controller that sets priorities for cache memory slots based on command priorities, managing slot allocation and discarding to ensure high-priority data is cached longer, and dynamically adjusting slot counts based on actual response times.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the execution sequence of commands is controlled according to priority set by host computer, then QoS is improved, but response time for high-priority read commands increases when data is not in cache memory
Solution Approach 1:
The cache controller pre-loads data into cache memory slots before high-priority read commands arrive by monitoring write commands and proactively caching data that is likely to be read soon. This preliminary action ensures that when high-priority read commands arrive, the data is already in the cache, eliminating the time penalty of reading from storage devices.
Solution Approach 2:
The cache controller dynamically adjusts slot allocation and data retention policies based on command priorities. High-priority slots are allocated more cache memory and retained longer, while low-priority slots use less memory and are discarded sooner. This dynamic adaptation allows the system to optimize response time for high-priority commands while maintaining overall QoS.
2Productivity
If data is read from storage device and stored in cache memory for high-priority read command, then the command is processed, but the processing time increases and QoS deteriorates
Solution Approach 1:
The system performs preliminary caching of data during write operations. When data is written to storage, the cache controller proactively copies it to cache memory slots marked for high-priority access. This preliminary action transforms subsequent high-priority read operations from slow storage reads to fast cache reads, dramatically reducing processing time.
Solution Approach 2:
The cache memory acts as an intermediary between storage devices and the host computer. By introducing this intermediate layer with priority-based slot management, the system decouples the slow storage access from fast command processing, allowing high-priority commands to be serviced from the faster cache layer without directly accessing slow storage devices.
3Device complexity
If cache memory slots are allocated without priority-based control, then cache management is simple, but response performance for high-priority commands cannot be optimized
Solution Approach 1:
The cache memory is segmented into multiple slots with different priority levels. Each slot is independently managed with its own priority tag, allowing the cache controller to make granular decisions about which data to retain and which to discard. This segmentation enables priority-based optimization without requiring complete redesign of cache management.
Solution Approach 2:
The cache controller changes the parameter of slot retention time based on priority. High-priority slots have extended retention times and higher replacement thresholds, while low-priority slots have shorter retention times. This parameter change allows the same cache memory to serve different QoS requirements without hardware modification.
Data Source
AI summary
To improve response performance of a storage control device. A storage control device 1 connected to a host computer 2 includes: a communication unit 1A that receives a command, to which a priority is set, from the host computer; a command executing unit 1B that executes the command received from the communication unit according to the priority; a cache memory 1C that is used by the command executing unit; a cache controller 1E that manages slots of the cache memory; and a plurality of storage devices 1D(1) and 1D(2) that stores data used by the host computer. The cache controller sets the priority to a slot that stores target data of the command and controls the data stored in the slot according to the priority.