Cache Controller Mediator for Multi-Node Shared Memory Coherence

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Solution Overview

Problem

Existing computing systems face challenges in efficiently managing data exchange and synchronization between multiple nodes, particularly in ensuring that data is updated correctly and consistently across all nodes.

Innovation Solution

The method involves executing global load and store instructions across multiple nodes, using a shared memory architecture where each node can access and update data in the shared memory, while maintaining cache coherence through control signals and cache controllers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple nodes access shared memory simultaneously, then processing capacity increases, but data consistency and synchronization become difficult to maintain

Engineering Contradiction:
Improveprocessing capacityVSAvoiddata consistency
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent introduces cache controllers as intermediary components between nodes and shared memory. These controllers manage cache coherence by intercepting memory access requests, validating cache data, and coordinating updates across multiple nodes. This intermediary layer enables simultaneous access while maintaining data consistency through controlled synchronization protocols.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system implements feedback mechanisms where cache controllers monitor and track the state of shared memory across all nodes. When data is modified in shared memory, the controllers provide feedback signals to invalidate or update corresponding cache copies in other nodes. This feedback loop ensures that all nodes eventually reach a consistent state without requiring complex locking protocols.

Inventive Principle:
Principle #23Feedback

2Speed

If cache memory is used to speed up access, then access speed improves, but ensuring cache coherence across nodes becomes more complex

Engineering Contradiction:
Improveaccess speedVSAvoidcache coherence management
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

Cache controllers serve as dedicated intermediary components that manage cache coherence independently from the main processing logic. These controllers handle validation, invalidation, and synchronization of cache data across nodes, isolating the complexity of coherence management from the application layer and enabling fast cache access without burdening processors with coherence protocol implementation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The cache system implements self-service mechanisms where cache controllers automatically detect and resolve coherence conflicts without external intervention. When a node modifies shared memory, the controller autonomously invalidates relevant cache copies in other nodes and manages the coherence state, allowing the system to maintain cache speed benefits while handling complexity internally through automated coherence protocols.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20250139010A1Systems and methods for computing with multiple nodes
Publication Date: 2025.05.01 SAMSUNG ELECTRONICS CO LTD
  • US20250139010A1 patent drawing
  • US20250139010A1 patent drawing
  • US20250139010A1 patent drawing

AI summary

Systems and methods for computing with multiple nodes. In some embodiments, a method includes: executing, by a first node of a plurality of nodes, a global load from a first address of a shared memory, the shared memory being shared by the nodes, the first address being an address within a shared memory section of a second node, the first address being cached in a first cache of the first node, the executing including: fetching a value stored in the shared memory, at the first address.