Cache Data Management for Electronic Devices

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Solution Overview

Problem

Current methods for managing cache data in electronic devices, particularly during game services, are inefficient, leading to increased loading times and user experience delays due to the need for frequent compilation of instructions by the processor.

Innovation Solution

A method and system where an electronic device identifies and transmits metadata associated with cache data to another device, allowing for the exchange and updating of cache data blocks, enabling the bypass of compilation and reducing loading times by utilizing pre-compiled cache data stored in memory.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the processor frequently compiles instructions during game service execution, then the instructions can be adapted to current hardware state, but loading times increase and user experience deteriorates

Engineering Contradiction:
Improveinstruction adaptation to hardware stateVSAvoidloading time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-compiling instructions into cache data before they are needed during game service execution. The processor compiles instructions in advance and stores them in cache memory, so that when execution is required, the pre-compiled instructions can be directly retrieved and executed without performing compilation at runtime, thereby reducing loading times while maintaining adaptability through selective updating of cache data.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If cache data is frequently updated and exchanged between devices, then network resource efficiency improves, but network bandwidth consumption increases

Engineering Contradiction:
Improvenetwork resource efficiencyVSAvoidnetwork bandwidth consumption
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent applies the extraction principle by selectively transmitting only the metadata associated with cache data blocks to other devices, rather than transmitting the entire cache data content. The metadata includes information such as the hash value of the cache data, which allows receiving devices to verify and update only the necessary portions of cache data, thereby reducing network bandwidth consumption while maintaining network resource efficiency through selective updates.

Inventive Principle:
Principle #2Taking out (Extraction)

3Adaptability or versatility

If the processor stores all instructions in memory for execution, then instruction availability is maximized, but memory usage increases

Engineering Contradiction:
Improveinstruction availabilityVSAvoidmemory usage
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The patent applies segmentation by dividing instructions into discrete cache data blocks that can be selectively stored and managed in memory. Each cache data block corresponds to a specific set of instructions and can be independently updated, exchanged, or removed from memory. This segmented approach allows the system to maintain instruction availability for active game services while reducing overall memory usage by only storing necessary instruction blocks rather than all possible instructions.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20220370920A1Electronic device and method for managing cache data
Publication Date: 2022.11.24 NC CORP
  • US20220370920A1 patent drawing
  • US20220370920A1 patent drawing
  • US20220370920A1 patent drawing

AI summary

A non-transitory computer readable medium according to various embodiments store one or more programs include instructions cause, a first processor of an first electronic device to, transmit in response to identification of a first instructions executable by a second processor of the electronic device, at least portion of information associated with the identified first instructions, to a second electronic device, receive a signal associated with the first instructions from the second electronic device, store in response to identification of second instructions distinct from the first instructions from the received signal and executable by the second processor, the second instructions in the memory and transmit in response to identification of a command indicating upload of the first instructions from the received signal, the first instructions executable by the second processor to the second electronic device.