Cache Memory ECC Reuse for Flexible Storage Capacity
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing cache memory devices with memory data protection functions based on parity or ECC waste storage area when the memory data protection function is disabled, as the storage area for parity check bits or ECC codes is not utilized, leading to inefficiency and increased costs or delivery times.
Innovation Solution
A cache memory device and semiconductor integrated circuit that allows selection of enabling or disabling the memory data protection function using a selection signal, where the storage area used for memory data protection can be repurposed as additional storage when the function is disabled, effectively utilizing the existing storage space.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a memory data protection function based on parity or ECC is implemented in a cache memory device, then data reliability is improved, but storage area is wasted when the protection function is disabled
Solution Approach 1:
The storage section that stores memory data protection data (ECC codes or parity check bits) is designed to serve dual purposes: when the memory data protection function is enabled, it performs error detection and correction; when disabled, it functions as additional data storage ways. This multi-functionality eliminates the waste of storage area while maintaining the option for high reliability when needed.
Solution Approach 2:
The cache memory device dynamically reconfigures the storage section based on the enable/disable state of the memory data protection function. A selection signal controls whether the storage section operates as an error protection storage area or as extended data storage, allowing the system to adapt its storage capacity to actual needs while maintaining hardware flexibility.
2Area of stationary object
If the memory data protection function is disabled to avoid wasting storage area, then storage capacity is improved, but data reliability is reduced
Solution Approach 1:
The same storage section provides both error protection capability and extended storage capacity. When high reliability is needed, the storage section functions as ECC/parity storage; when maximum storage capacity is needed, it functions as data storage ways. This eliminates the need to choose between reliability and capacity.
Solution Approach 2:
The system changes the operational parameter of the storage section based on the enable/disable state of the protection function. The selection signal alters the functional state of the storage section, transforming it between error protection mode and data storage mode, thereby providing both high reliability and high storage capacity under different operating conditions.
3Reliability
If dedicated storage areas for ECC or parity data are allocated, then error detection and correction capability is improved, but storage efficiency deteriorates when protection is disabled
Solution Approach 1:
The storage section is designed with universal functionality to serve both as dedicated error protection storage and as general data storage. This eliminates the inefficiency of dedicated storage areas when protection is disabled, as the same hardware resources are productively utilized for data storage instead of remaining idle.
Solution Approach 2:
The storage section automatically adapts its function based on the operational mode selected by the control logic. When the protection function is disabled, the storage section serves itself as data storage without requiring separate dedicated storage areas, thereby improving storage efficiency while maintaining the option for error protection when needed.
Data Source
AI summary
A memory cache device in which a storage area used for a memory data protection function is effectively used at the time of not using the memory data protection function. A mode selection signal makes ECC code sections for storing an ECC code function as a storage area for storing ECC codes used for performing error detection or error correction on data stored in data RAMs at the time the memory data protection function is enabled and as a way added to the data RAMs at the time the memory data protection function is disabled.


