Cache Encryption for Side-Channel Attack Prevention
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Solution Overview
Problem
Existing solutions for mitigating eviction-based cache side-channel attacks are inefficient, either dedicating cache space for each core or relying on software-based randomization, which is impractical for large-scale systems and vulnerable to timing attacks.
Innovation Solution
Implementing a caching system that operates on an Encrypted Address Space (EAS) using a low-latency block cipher to encrypt physical line addresses, dynamically remapping cache locations to prevent adversaries from inferring access patterns, and using epoch identifiers to manage key changes and cache remapping.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If preservation-based mitigation is used to protect cache lines from eviction, then security against side-channel attacks is improved, but cache space utilization deteriorates due to dedicating portions of LLC for each core
Solution Approach 1:
The patent implements dynamic remapping of cache lines using encryption, where the mapping between physical line addresses and cache locations changes over time through periodic re-encryption with different keys. This dynamic approach provides security without requiring static reservation of cache space for each core, allowing full utilization of the shared LLC while preventing eviction-based attacks.
Solution Approach 2:
The system changes the encryption key parameter periodically to remap cache lines, transforming the static cache mapping into a dynamic one. By changing the encryption key, the same physical line address maps to different cache locations at different times, providing security against side-channel attacks while maintaining efficient cache space utilization.
2Reliability
If randomization-based mitigation with mapping tables is used, then security against eviction attacks is improved, but device complexity deteriorates due to impractically large mapping tables for LLC
Solution Approach 1:
The patent extracts the mapping information from large software-based mapping tables and embeds it directly into the hardware encryption logic. The encryption key and algorithm itself serve as the mapping mechanism, eliminating the need for separate large mapping tables while providing the same randomization protection against eviction attacks.
Solution Approach 2:
The system replaces the software-based mapping table approach with a hardware-based encryption mechanism. Instead of using large software tables to track random mappings, the patent uses cryptographic encryption in hardware to dynamically determine cache line locations, significantly reducing complexity and storage requirements.
3Reliability
If table-based randomization is implemented for protected applications, then security against cache attacks is improved, but productivity deteriorates due to OS overhead and application grouping requirements
Solution Approach 1:
The encryption and remapping mechanism is implemented in hardware within the cache controller itself, allowing the cache to autonomously perform security operations without OS intervention. The system self-manages the encryption keys and remapping logic, eliminating the need for OS-based application grouping and mapping table management, thus improving system performance while maintaining security.
4Reliability
If frequent cache remapping is performed to maintain security, then security against continuous attacks is improved, but loss of time increases due to remapping overhead
Solution Approach 1:
The system performs cache remapping periodically rather than continuously, using time-based or access-count-based triggers to switch encryption keys. This periodic remapping provides security against continuous attacks while minimizing the frequency of remapping operations, thereby reducing the time overhead associated with key changes and cache line remapping.
Data Source
AI summary
Disclosed herein is a method of accessing a cache, the method comprising: mapping respective physical line addresses (PLAs) of a plurality of PLAs to respective cache locations of a plurality of cache locations in a cache, each PLA of the plurality of PLAs having an associated memory line; encrypting, with a block cipher using a first key, a first PLA of the plurality of PLAs to provide a first encrypted line address (ELA), the first ELA having an associated first encrypted cache location; upon receiving a request to access a first memory line associated with the first PLA, encrypting, using the first key, the first PLA into the first ELA to determine the associated first encrypted cache location; and accessing the first encrypted cache location. Also disclosed herein are systems for implementing the same.


