Cache Entry Replacement Control Using Base Usefulness Segmentation

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Solution Overview

Problem

Existing cache systems face challenges in efficiently managing cache entry replacements, particularly during global usefulness reductions, due to limited read/write ports and the need for individual updates of entry usefulness values, which can lead to performance bottlenecks and reduced cache capacity.

Innovation Solution

The implementation of a cache replacement control system that uses a base usefulness value stored in base usefulness storage circuitry to determine the usefulness level of cache entries, allowing for global usefulness reductions by updating the base value instead of individual entry values, and includes mechanisms to boost or reduce entry usefulness based on usage events.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If individual entry usefulness values are updated during global usefulness reductions, then cache entry replacement accuracy is improved, but cache performance deteriorates due to limited read/write ports and update bottlenecks

Engineering Contradiction:
Improvecache entry replacement accuracyVSAvoidcache performance
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The usefulness value is segmented into two independent components: a global base usefulness value stored in base usefulness storage circuitry, and individual entry usefulness offsets stored in the cache entries themselves. This segmentation allows the base value to be updated globally without requiring updates to each individual entry, thus maintaining replacement accuracy while avoiding performance bottlenecks during global usefulness reductions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The common global usefulness information is extracted from individual cache entries and placed into separate base usefulness storage circuitry. This extraction allows the global component to be updated independently and efficiently, while only the necessary individual offset information remains in the cache entries, reducing update overhead and improving cache performance during global usefulness reductions.

Inventive Principle:
Principle #2Taking out (Extraction)

2Measurement precision

If individual entry usefulness values are updated during global usefulness reductions, then usefulness tracking accuracy is improved, but cache capacity deteriorates due to increased storage requirements

Engineering Contradiction:
Improveusefulness tracking accuracyVSAvoidcache capacity
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The usefulness value is segmented into a global base component stored separately and individual entry offsets stored in cache entries. This segmentation reduces the storage burden on cache capacity since the large global base value is stored once in base usefulness storage circuitry rather than being replicated in every cache entry, while still maintaining accurate usefulness tracking through the combination of base value and individual offsets.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11288209B2Controlling cache entry replacement based on usefulness of cache entry
Publication Date: 2022.03.29 ARM LTD
  • US11288209B2 patent drawing
  • US11288209B2 patent drawing
  • US11288209B2 patent drawing

AI summary

An apparatus comprises a cache comprising cache entries, each cache entry storing cached information and an entry usefulness value indicative of usefulness of the cached information. Base usefulness storage circuitry stores a base usefulness value. Cache replacement control circuitry controls, based on a usefulness level determined for a given cache entry, whether the given cache entry is selected for replacement. The cache replacement control circuitry determines the usefulness level for the given cache entry based on a difference between the entry usefulness value specified by the given cache entry and the base usefulness value stored in the base usefulness storage circuitry.