Cache Line Eviction Protocol With Early GV Release
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Solution Overview
Problem
Cache line evictions in multi-node computing systems create bottlenecks and occupancy pressure due to serial execution of transactions, particularly in large systems with multiple CPU clusters, leading to inefficiencies in maintaining cache coherency.
Innovation Solution
Implementing a non-blocking virtual channel and early Global Visibility (GV) responses to prioritize cache line eviction transactions, along with asynchronous processing to reduce resource occupancy and ensure timely data coherency across the system.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If cache line eviction transactions are executed serially to maintain cache coherency, then data coherency is preserved, but transaction latency and resource occupancy increase
Solution Approach 1:
The patent applies preliminary action by sending an early Global Visibility (GV) response to the cache subsystem before the cache line eviction transaction is fully complete. This allows the cache subsystem to be released and begin processing other transactions in advance, reducing overall transaction latency while maintaining coherency through the prioritized channel that ensures the eviction transaction completes atomically.
Solution Approach 2:
The patent segments the cache line eviction transaction into two parts: (1) sending the cache line to the coherent slave over a prioritized channel, and (2) sending an early GV response to release the cache subsystem. This segmentation allows overlapping of transactions and reduces resource occupancy time.
2Device complexity
If cache line eviction transactions are executed serially, then coherency protocols are simplified, but system performance and throughput deteriorate
Solution Approach 1:
The patent introduces a new dimension - a dedicated prioritized channel - for cache line eviction transactions. This separate channel allows eviction transactions to be processed with higher priority without complicating the existing coherency protocol logic, thereby improving throughput while maintaining protocol simplicity.
Solution Approach 2:
By sending the early GV response before the eviction transaction completes, the system enables overlapping of transactions and reduces resource occupancy, improving throughput without requiring complex protocol changes.
3Reliability
If cache line eviction transactions occupy resources for extended periods, then coherency is maintained, but resource occupancy pressure and bottlenecks increase
Solution Approach 1:
The patent reduces resource occupancy by sending the early GV response before the cache line eviction transaction is fully complete. This allows the cache subsystem to release resources in advance while the eviction transaction continues over the prioritized channel, thereby reducing bottlenecks and occupancy pressure while maintaining coherency.
4Loss of time
If prioritized channels are used for cache line evictions, then transaction latency is reduced, but device complexity increases
Solution Approach 1:
The patent segments the transaction channel into a prioritized channel for cache line evictions and regular channels for other transactions. This segmentation is implemented at the interface between the coherent master and coherent slave, providing a simple yet effective priority mechanism without requiring complex channel management throughout the entire system.
Data Source
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AI summary
Disclosed are examples of a system and method to communicate cache line eviction data from a CPU subsystem to a home node over a prioritized channel and to release the cache subsystem early to process other transactions.