Cache Eviction Policies for Memory Systems

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Solution Overview

Problem

Current memory systems face challenges in optimizing cost, profitability, performance, and efficiency due to limitations in cache management and virtual address handling.

Innovation Solution

Implementing a memory system with multiple cache eviction policies and virtual address modification policies, such as Morton ordering, to manage cache storage units and allocate memory effectively, using application programming interfaces (APIs) to manage memory allocation and eviction policies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a single cache eviction policy is used, then device complexity is reduced, but memory system performance and adaptability to different workloads deteriorate

Engineering Contradiction:
Improveadaptability to different workloadsVSAvoidcache management complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements dynamic cache eviction by allowing the eviction policy to change based on workload characteristics. The system monitors access patterns and dynamically selects between different eviction policies (LRU, FIFO, random) to optimize performance for different types of memory access workloads, making the cache management adaptive rather than static.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of eviction policy selection based on workload detection. By detecting whether the current workload exhibits sequential, random, or other access patterns, the system adjusts the eviction policy parameter accordingly, transforming a fixed-parameter system into a variable-parameter system that optimizes for current conditions.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If cache storage is increased, then memory performance is improved, but cost and device complexity increase

Engineering Contradiction:
Improvememory system performanceVSAvoidcache storage requirements
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies address modification techniques that transform virtual addresses to improve cache utilization. By modifying addresses based on detected access patterns (such as transposing row-major to column-major ordering), the system enhances temporal and spatial locality without requiring additional cache storage, effectively improving performance through parameter transformation rather than resource expansion.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If address modification policies are implemented, then cache utilization is improved, but device complexity and processing overhead increase

Engineering Contradiction:
Improvecache utilization efficiencyVSAvoidaddress handling complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system implements self-service address modification by automatically detecting access patterns and applying appropriate address transformations without external intervention. The cache management unit monitors its own usage and autonomously adjusts address modification strategies, reducing the need for complex external control mechanisms while maintaining improved cache utilization.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS10216632B2Memory system cache eviction policies
Publication Date: 2019.02.26 KASS MICHAEL HENRY
  • US10216632B2 patent drawing
  • US10216632B2 patent drawing
  • US10216632B2 patent drawing

AI summary

A memory system implements a plurality of cache eviction policies and optionally a plurality of virtual address modification policies. A cache storage unit of the memory system has a plurality of cache storage sub-units. The cache storage unit is optionally managed by a cache management unit in accordance with the cache eviction polices. The cache storage sub-units are allocated for retention of information associated with respective memory addresses and are associated with the cache eviction policies in accordance with the respective memory addresses. For example, in response to a reference to an address that misses in a cache, the address is used to access a page table entry having an indicator specifying an eviction policy to use when selecting a cache line from the cache to evict in association with allocating a cache line of the cache to retain data obtained via the address.