Cache Flush with Modified Data Using Address Indexing

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Solution Overview

Problem

Conventional methods for flushing cache line entries with modified data from a lower level cache to a next level cache can result in adverse timing impacts and performance degradation, especially when the next level cache does not include the lower level cache, requiring complex implementations.

Innovation Solution

Accessing the cache with modified data using an index and way to secure an address, then using that address to retrieve and write the data into the next level cache, facilitating a straightforward and timing-neutral flushing process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional flushing methods are used to write-back cache line entries one index and way at a time, then cache data can be flushed to the next level cache, but timing performance deteriorates and implementation complexity increases

Engineering Contradiction:
Improvecache flushing completenessVSAvoidflush operation timing
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The cache is segmented into multiple banks, and the flush operation is performed in parallel across multiple banks simultaneously. Each bank can be flushed independently and concurrently, transforming a sequential one-at-a-time operation into a parallel operation that completes much faster while maintaining complete data transfer.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The method identifies and prepares cache lines for flushing in advance by checking the valid bit status before the actual flush operation. Cache lines with valid data are marked and organized for parallel transfer, so that when the flush is triggered, the data is already ready for immediate simultaneous write-back to multiple banks, eliminating delays during the execution phase.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If conventional flushing methods are used to write-back cache line entries one index and way at a time, then cache data can be flushed to the next level cache, but implementation complexity increases

Engineering Contradiction:
Improvecache flushing completenessVSAvoidflush operation implementation
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Multiple cache bank flush operations are merged into a single unified flush operation. The control logic combines the addressing, validation, and data transfer for multiple banks into one coordinated action, where a single flush command triggers simultaneous write-backs across all valid cache lines in all banks, greatly simplifying the control mechanism compared to individual sequential operations.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The flush operation processes all valid cache lines in parallel across multiple banks, potentially flushing more data than immediately needed. This excessive action approach ensures complete flushing of all modified data without requiring complex selective routing logic, as the parallel architecture naturally handles the bulk operation efficiently.

Inventive Principle:
Principle #16Partial or excessive action

3Adaptability or versatility

If the next level cache does not include the lower level cache, then cache hierarchy flexibility is improved, but flushing operation complexity increases

Engineering Contradiction:
Improvecache hierarchy configurationVSAvoidflush operation implementation
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

Each cache bank performs self-service during the flush operation by autonomously identifying its own valid cache lines and independently transferring them to the next level cache in parallel. The valid bit in each bank's cache lines serves as a self-identifying marker, eliminating the need for complex centralized control logic to manage the non-inclusive cache hierarchy, as each unit handles its own flush operations independently yet simultaneously.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS10210101B2Systems and methods for flushing a cache with modified data
Publication Date: 2019.02.19 INTEL CORP
  • US10210101B2 patent drawing
  • US10210101B2 patent drawing
  • US10210101B2 patent drawing

AI summary

Systems and methods for flushing a cache with modified data are disclosed. Responsive to a request to flush data from a cache with modified data to a next level cache that does not include the cache with modified data, the cache with modified data is accessed using an index and a way and an address associated with the index and the way is secured. Using the address, the cache with modified data is accessed a second time and an entry that is associated with the address is retrieved from the cache with modified data. The entry is placed into a location of the next level cache.