Environment-Aware Cache Flushing in Multi-Processor Systems

Solution Overview

Problem

Cache flushing operations in multi-processor computing systems introduce latency, blocking applications and affecting user experience, as existing methods are inefficient in managing cache flushing across multiple processors.

Innovation Solution

A method and system that select the most suitable cache flushing mechanism based on the extent of flushing and the runtime environment, including the number of active processors, to efficiently flush caches to system memory, utilizing mechanisms such as complete flushing, address-range-specific flushing, and parallel flushing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If cache flushing is performed to ensure data consistency between caches and system memory, then data reliability is improved, but application latency increases and system performance deteriorates

Engineering Contradiction:

Improvedata consistencyVSAvoidapplication latency

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the cache flushing operation by allowing different processors to flush different portions of their caches concurrently. Instead of a single sequential flush operation, multiple processors perform flush operations in parallel, dividing the overall flushing task into independent segments that can execute simultaneously, thereby reducing total flush time while maintaining data consistency.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic cache flushing by allowing processors to flush caches on-demand based on runtime conditions rather than following a fixed flushing schedule. The system dynamically determines when and what to flush based on application needs and system state, optimizing the balance between data consistency and performance by performing flushes only when necessary.

Inventive Principle:

Principle #15Dynamics

2Reliability

If cache flushing is performed sequentially to ensure data consistency, then reliability is improved, but productivity decreases due to blocked applications

Engineering Contradiction:

Improvedata consistencyVSAvoidsystem throughput

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The patent segments the cache flushing operation by allowing different processors to flush different portions of their caches concurrently. Instead of a single sequential flush operation, multiple processors perform flush operations in parallel, dividing the overall flushing task into independent segments that can execute simultaneously, thereby reducing total flush time while maintaining data consistency.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent merges multiple cache flushing operations into a single coordinated event where multiple processors participate in flushing simultaneously. By combining individual flush operations into a unified parallel execution model, the system achieves both data consistency and improved throughput, as multiple processors contribute to the flushing task at the same time rather than taking turns.

Inventive Principle:

Principle #5Merging (Combining)

3Device complexity

If a simple cache flushing mechanism is used, then device complexity is reduced, but adaptability to different runtime environments deteriorates

Engineering Contradiction:

Improveflushing mechanism complexityVSAvoidenvironment-aware flushing

Core Design Contradiction:

Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamic cache flushing by allowing processors to flush caches on-demand based on runtime conditions rather than following a fixed flushing schedule. The system dynamically determines when and what to flush based on application needs and system state, optimizing the balance between data consistency and performance by performing flushes only when necessary.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent changes the parameters of cache flushing operations based on runtime environment conditions. The system adjusts flushing behavior according to factors such as the number of active processors, cache hit rates, and application performance requirements, transforming a static flushing mechanism into an adaptive one that optimizes its operation based on current system state.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS9639467B2Environment-aware cache flushing mechanism

Publication Date: 2017.05.02 MEDIATEK INC

AI summary

A computing system performs an environment-aware cache flushing method. When a processor in the system receives a signal to flush at least a portion of the caches to the system memory, the processor determines a flushing mechanism among multiple candidate flushing mechanisms. The processor also determines one or more of the active processors in the system for performing the flushing mechanism. The determinations are based on the extent of flushing indicated in the signal and a runtime environment that includes the number of active processors. The system then flushes the caches to the system memory according to the flushing mechanism.