Cache Hard Error Handling via Record Isolation

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Solution Overview

Problem

Current data processing systems face challenges in effectively handling hard errors in caches, particularly in write back caches, where errors can lead to performance degradation and system loops, and existing techniques require significant power and area resources or external analysis.

Innovation Solution

A data processing apparatus with cache record error storage and hard error storage mechanisms that detect errors, adjust count values, and logically exclude hard error cache records from further use, allowing for automatic containment and correction of hard errors without masking soft errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If error correction techniques are applied to hard errors in cache storage devices, then the correct data value can be provided to the requesting device, but the corrected data value will be stored incorrectly again when written back to the same memory location due to the storage device fault

Engineering Contradiction:
Improvedata correctnessVSAvoiderror handling complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The invention segments error handling into two distinct paths: soft error correction (which writes corrected data back to storage) and hard error handling (which redirects future accesses to alternative storage locations). This segmentation prevents the futile cycle of correcting and re-corrupting hard errors while maintaining efficient soft error correction.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention introduces an intermediary mechanism (replacement storage location identification and redirection logic) that mediates between the faulty storage device and the processing device. When a hard error is detected, the system redirects subsequent accesses to an alternative location, acting as a mediator to bypass the faulty storage without requiring complex analysis or external intervention.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If cache records are masked or invalidated upon error detection, then further errors can be prevented, but soft errors are unnecessarily excluded from use

Engineering Contradiction:
Improveerror containmentVSAvoidcache utilization
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The invention applies local quality by treating soft errors and hard errors differently at the cache record level. Soft errors are corrected in place and the cache record remains usable, while hard errors trigger redirection to alternative locations. This localized differentiation maintains high cache utilization for soft errors while ensuring reliability for hard errors.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The invention changes the parameter of error persistence detection. By monitoring whether errors recur at the same cache record location, the system dynamically determines the error type (soft vs. hard) and adjusts the handling strategy accordingly, rather than using a static masking approach.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If external analysis mechanisms are implemented to determine error types, then accurate error handling can be achieved, but system complexity and cost increase significantly

Engineering Contradiction:
Improveerror detection accuracyVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The invention implements self-service error handling where the cache control circuitry autonomously detects error types and applies appropriate correction or redirection strategies without requiring external analysis mechanisms. The system serves itself by monitoring error patterns and making intelligent decisions, eliminating the need for complex external analysis infrastructure.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The invention employs feedback mechanisms where error detection results are fed back to the cache control circuitry, which then adjusts its behavior accordingly. This closed-loop feedback system enables automatic error type determination and appropriate handling without external intervention, maintaining simplicity while achieving accurate error management.

Inventive Principle:
Principle #23Feedback

4Reliability

If in-line error correction operations are performed on cache reads, then both hard and soft errors can be corrected, but additional logic increases timing delays and power consumption

Engineering Contradiction:
Improveerror correction capabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The invention applies partial action by performing error correction only when and where needed, rather than universally on all cache reads. Soft errors are corrected in place with minimal overhead, while hard errors trigger redirection. This selective approach avoids the excessive power consumption and timing delays of universal in-line correction while maintaining comprehensive error handling capability.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS7987407B2Handling of hard errors in a cache of a data processing apparatus
Publication Date: 2011.07.26 ARM LTD
  • US7987407B2 patent drawing
  • US7987407B2 patent drawing
  • US7987407B2 patent drawing

AI summary

A data processor includes a cache record error storage and a hard error storage having at least one record error storage and at least one hard error record, respectively, both for keeping track of errors detected when accessing cache records. When an error is first detected, one of the error records in the cache record error storage is allocated to store a cache record identifier for that cache record, and an associated count value is set to a first value. If an error is detected when accessing a cache record, a correction operation is performed in respect of that currently accessed cache record, and access to that currently accessed cache record is then re-performed. If the count value reaches a predetermined threshold value, then the cache record identifier is moved from the cache record error storage to an error record of the hard error storage.