Cache Invalidation Translation for Distributed File System Coherency
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Solution Overview
Problem
Cache coherency issues arise when a file system is presented as a local device to a host device, but the backend file system is part of a distributed system unknown to the host, leading to unsynchronized caches and performance degradation due to outdated data in virtual machines.
Innovation Solution
A channel is established from a peripheral device to the host device to provide cache invalidation from a backend function to the host device, using a translation function to translate the invalidation and a notification queue to ensure synchronized caches, thereby improving performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If device emulation is used to allow VM to communicate with network and file systems, then hardware independence and adaptability are improved, but latency increases due to translation layer overhead
Solution Approach 1:
The system segments the device emulation functionality into distinct components: a device emulation function exposed to the VM, a translation layer in the peripheral device, and a backend function. This segmentation allows the translation operation to be performed in hardware close to the I/O operation, reducing the time penalty while maintaining hardware independence through the emulation layer.
Solution Approach 2:
The patent introduces an intermediary translation layer in the peripheral device that sits between the device emulation function and the backend. This intermediary performs format translation locally, eliminating the need for the host device to perform translation operations, thereby reducing latency while preserving hardware independence through the emulation interface.
2Ease of operation
If file system is presented as local device to host device, then ease of operation and performance are improved, but cache coherency is lost when backend is distributed system
Solution Approach 1:
The system implements a feedback mechanism where the translation layer in the peripheral device receives notifications about backend operations (such as writes or invalidations) and automatically generates corresponding cache invalidation messages to send to the host device. This feedback loop maintains cache coherency without requiring the host device to know about the distributed backend, preserving ease of operation.
Solution Approach 2:
The translation layer performs preliminary actions by pre-processing backend operations and proactively invalidating caches before the host device performs I/O operations. This preliminary cache invalidation ensures that when the host device accesses data, the cache is already coherent with the backend state, maintaining both ease of operation and reliability.
3Device complexity
If translation layer is disposed in host device, then device emulation functionality is simplified, but latency increases due to additional processing overhead
Solution Approach 1:
Instead of placing the translation layer in the host device (the conventional approach), the patent inverts the architecture by placing the translation layer in the peripheral device. This inversion moves the translation operation closer to the data source, reducing the distance data must travel and eliminating redundant processing in the host device, thereby reducing latency while maintaining architectural simplicity.
Data Source
AI summary
In one embodiment, a device includes a host interface to be connected to a host device via a data communication bus; and at least one processing core to expose a device emulation function to the host device, maintain a peripheral device cache, invalidate a cache entry in peripheral device cache in response to receiving a cache invalidation from a backend function, execute a translation function to translate between a format of the device emulation function and a format of the backend function, receive the cache invalidation from the backend function, translate the cache invalidation to the format of the device emulation function, and provide the translated cache invalidation function to the device emulation function being executed by a processor of the host device.