Hierarchical Cache Key-Based Write-Back Invalidation

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Solution Overview

Problem

Current computing systems lack the ability to manage hierarchical cache structures in granularity of keys, which is essential for secure and efficient data management, particularly in systems employing total memory encryption.

Innovation Solution

A method is introduced that allows the operating system to manage a hierarchical cache structure using key identification codes, enabling write-back and invalidation operations on specific cache lines or groups of cache lines based on designated keys, thereby enhancing security and performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If total memory encryption is enabled with key-based management, then security is improved, but the hierarchical cache structure cannot be managed in granularity of keys

Engineering Contradiction:
ImprovesecurityVSAvoidcache management capability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent segments the cache management function by introducing key identification codes (KICs) that associate specific cache lines with specific encryption keys. This allows the hierarchical cache structure to be divided into key-managed segments, enabling granular control over which cache lines are encrypted with which keys, thus resolving the contradiction between security and cache management capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces key identification codes as an intermediary mechanism between the encryption key management system and the hierarchical cache structure. These KICs serve as mediators that enable the OS to manage cache lines in relation to encryption keys, bridging the gap between security requirements and cache management needs without requiring fundamental changes to either system.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If key-based granular management is implemented in hierarchical cache, then cache management precision is improved, but system complexity increases

Engineering Contradiction:
Improvecache management precisionVSAvoidsystem complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent makes the key identification code mechanism universal by integrating it into the existing cache line structure and memory management framework. The same KIC mechanism serves multiple functions: identifying cache lines, associating them with encryption keys, and enabling granular management operations. This multi-functionality achieves precise management without proportionally increasing system complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11971821B2Computing system with write-back and invalidation in a hierarchical cache structure based on at least one designated key identification code
Publication Date: 2024.04.30 VIA ALLIANCE SEMICON CO LTD
  • US11971821B2 patent drawing
  • US11971821B2 patent drawing
  • US11971821B2 patent drawing

AI summary

A computing system with a first instruction of an instruction set architecture (ISA) for write-back and invalidation in a hierarchical cache structure based on one single designated key identification code, and a second instruction of ISA for write-back and invalidation in the hierarchical cache structure based on a plurality of designated key identification codes is shown. A decoder transforms the first or second instruction into at least one microinstruction. Based on the at least one microinstruction, one write-back and invalidation request is provided corresponding to each designated key identification code, to be passed to the hierarchical cache structure through a memory ordering buffer. For each write-back and invalidation request, the cache line write-back and invalidation regarding a designated key identification code is performed on a last-level cache first, and then is performed on the in-core cache modules.