Hierarchical Cache Line Allocation with Indicator Bits

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Solution Overview

Problem

Multi-level hierarchical data storage systems face challenges in maintaining coherency and efficiency due to the need to store duplicate data items across different levels, which can lead to increased access times and processor performance issues when cleaning and invalidating lines.

Innovation Solution

Implementing a storage apparatus with a hierarchy that includes indicator storage elements in higher level stores to mark duplicate data items, allowing for efficient allocation and eviction without communicating with lower level stores, thereby reducing traffic and improving performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If duplicate copies of data items are stored in both level one and level two stores, then coherency is maintained and access reliability is improved, but storage space is wasted and eviction efficiency deteriorates

Engineering Contradiction:
Improvecoherency maintenanceVSAvoidstorage management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements inclusive caching where duplicate copies of data items are stored in both level one and level two stores. This copying approach ensures that when data is accessed, it can be retrieved from the faster level one store without needing to verify coherency with the level two store, thereby maintaining reliability while simplifying eviction management through indicator bits.

Inventive Principle:
Principle #26Copying

2Reliability

If inclusive caching is implemented to maintain coherency, then data access reliability improves, but cache storage space increases and eviction becomes less efficient

Engineering Contradiction:
Improvedata access reliabilityVSAvoideviction efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by setting indicator bits in advance to mark which cache lines in the level two store have duplicate copies in the level one store. This preliminary marking allows the eviction logic to immediately identify and protect these lines without needing to perform snooping operations at eviction time, thereby improving eviction efficiency while maintaining inclusive caching benefits.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If lower level store snooping is performed during higher level store allocation, then coherency is ensured, but access time increases and processor performance deteriorates

Engineering Contradiction:
ImprovecoherencyVSAvoidaccess time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts the coherency verification function from the data access path by maintaining indicator bits that pre-mark which level two store lines have duplicates in level one stores. This extraction eliminates the need to snoop lower level stores during normal data access and allocation operations, thereby reducing access time and improving processor performance while still ensuring coherency through the indicator bit mechanism.

Inventive Principle:
Principle #2Taking out (Extraction)

4Adaptability or versatility

If duplicate data items are stored across hierarchical levels, then data availability improves, but communication overhead increases during cleaning and invalidation operations

Engineering Contradiction:
Improvedata availabilityVSAvoidcommunication overhead
Core Design Contradiction:
Adaptability or versatilityVSLoss of energy

Solution Approach 1:

The patent uses copying to create duplicate data items in both level one and level two stores, which improves data availability by allowing accesses to be served from the faster level one store. The copying approach combined with indicator bits reduces communication overhead during cleaning and invalidation operations, as the indicator bits provide immediate information about which lines have duplicates without requiring inter-store communication.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS8271733B2Line allocation in multi-level hierarchical data stores
Publication Date: 2012.09.18 ARM LTD
  • US8271733B2 patent drawing
  • US8271733B2 patent drawing
  • US8271733B2 patent drawing

AI summary

A storage apparatus for storing data is disclosed. The storage apparatus comprises: a plurality of stores having storage locations for storing data items, including a level one store and a level two store the storage apparatus having a hierarchy such that in response to an access request for accessing a data item the level one store is accessed and in response to detecting that the item is not stored in the level one store the level two store is accessed. The storage apparatus is configured to store a copy of at least some items in both of the one level one store and the level two store, the storage apparatus comprising a plurality of indicator storage elements associated with a corresponding plurality of storage locations of the level two store, a set value of an indicator stored in one of the indicator storage elements indicating that the corresponding stored data item is also stored in the level one store. The storage apparatus is configured such that in response to a request to allocate a storage location in the level two store, storage locations having a set indicator associated with them are not selected for eviction.