Cache Line Allocation Using Opportunistic Indicators
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Solution Overview
Problem
Conventional cache allocation systems fail to effectively utilize higher-level cache memory by allocating evicted cache lines that are not useful, leading to performance degradation due to 'cache pollution' and reduced cache hit rates.
Innovation Solution
A processor-based system determines whether an evicted cache line is opportunistic or useful and communicates this information to higher-level cache memory, replacing less important cache lines with the evicted line only if the higher-level cache line has equal or lesser importance, thereby optimizing cache allocation and reducing cache pollution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If evicted cache lines are allocated to higher-level cache memory, then cache memory utilization increases, but cache hit rate decreases due to cache pollution
Solution Approach 1:
The patent applies local quality by differentiating between useful and opportunistic cache lines, allocating only opportunistic lines to higher-level cache memory. This selective allocation ensures that high-quality (useful) lines remain in lower-level caches where they can be efficiently accessed, while lower-quality (opportunistic) lines are moved to higher-level caches, thus maintaining high cache hit rates while improving overall utilization.
Solution Approach 2:
The patent inverts the conventional approach by not allocating all evicted cache lines to higher-level cache memory. Instead, it selectively allocates only opportunistic lines, thereby preventing cache pollution and maintaining high hit rates in lower-level caches while still improving higher-level cache utilization.
2Reliability
If higher-level cache memory size is increased to store more cache lines, then cache hit rate improves, but area and power consumption increase
Solution Approach 1:
The patent implements dynamic cache line allocation based on the opportunistic indicator, allowing the system to adaptively manage cache resources. By dynamically identifying and allocating only opportunistic cache lines to higher-level cache memory, the system optimizes cache hit rates without requiring additional cache memory area, thereby avoiding increased power consumption.
3Adaptability or versatility
If evicted cache lines are written to higher-level cache memory, then data sharing among PUs improves, but cache memory pollution increases
Solution Approach 1:
The patent applies local quality by identifying opportunistic cache lines with the opportunistic indicator and selectively allocating only these lines to higher-level cache memory for sharing among PUs. This selective allocation prevents useful cache lines from being polluted in higher-level caches while still enabling effective data sharing of opportunistic lines, thus improving adaptability without generating cache pollution.
Data Source
AI summary
A processor-based system for allocating a higher-level cache line in a higher-level cache memory in response to an eviction request of a lower-level cache line is disclosed. The processor-based system determines whether the cache line is opportunistic, sets an opportunistic indicator to indicate that the lower-level cache line is opportunistic, and communicates the lower-level cache line and the opportunistic indicator. The processor-based system determines, based on the opportunistic indicator of the lower-level cache line, whether a higher-level cache line of a plurality of higher-level cache lines in the higher-level cache memory has less or equal importance than the lower-level cache line. In response, the processor-based system replaces the higher-level cache line in the higher-level cache memory with the lower-level cache line and associates the opportunistic indicator with the lower-level cache line in the higher-level cache memory.