Cache Line Lookup Avoidance via Hierarchical Allocation Rules
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Solution Overview
Problem
In computer systems, forwarding lookup requests to higher levels of the memory hierarchy increases latency and consumes bandwidth, as cache line lookups often miss in lower-level caches and require longer retrieval times from higher levels.
Innovation Solution
Implementing a system that maintains a lower-level cache and a higher-level cache according to specific rules, allowing determination of cache line presence and validity without accessing the higher-level cache, thereby avoiding unnecessary lookups and optimizing cache line allocation and victimization processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If lookup requests are forwarded to higher levels of the memory hierarchy when cache lines are not present in lower-level caches, then the system can retrieve missing cache lines, but this increases latency and consumes memory-system bandwidth
Solution Approach 1:
The system performs preliminary actions by allocating cache lines in the higher-level cache before they are actually needed in the lower-level cache. This advance allocation ensures that when a lookup occurs, the cache line is already reserved and can be quickly transferred, reducing the effective latency of cache misses.
Solution Approach 2:
The memory hierarchy is segmented into multiple cache levels with distinct allocation and access policies. The higher-level cache serves as a pre-allocation buffer, while the lower-level cache handles active access. This segmentation allows different operations (allocation vs. access) to occur in different segments, optimizing overall performance.
2Reliability
If lookup requests are forwarded to higher levels of the memory hierarchy, then missing cache lines can be retrieved, but memory-system bandwidth is consumed
Solution Approach 1:
Cache lines are pre-allocated in the higher-level cache before being needed in the lower-level cache. This preliminary allocation reduces the need for frequent bandwidth-intensive transfers, as the allocation overhead is performed separately from the data transfer path.
3Productivity
If the system maintains cache lines in both lower-level and higher-level caches according to allocation rules, then lookup efficiency is improved, but cache management complexity increases
Solution Approach 1:
The system changes the state parameters of cache lines by introducing allocation status flags that track whether a cache line is allocated in the higher-level cache. This parameter change enables efficient lookup operations while maintaining manageable complexity through structured state tracking.
Data Source
AI summary
Embodiments of the present invention provide a system that selectively performs lookups for cache lines. During operation, the system by maintains a lower-level cache and a higher-level cache in accordance with a set of rules that dictate conditions under which cache lines are held in the lower-level cache and the higher-level cache. The system next performs a lookup for cache line A in the lower level cache. The system then discovers that the lookup for cache line A missed in the lower-level cache, but that cache line B is present in the lower-level cache. Next, in accordance with the set of rules, the system determines, without performing a lookup for cache line A in the higher-level cache, that cache line A is guaranteed not to be present and valid in the higher-level cache because cache line B is present in the lower-level cache.