Selective Cache Line Encryption for Low-Latency Memory Access

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Solution Overview

Problem

Existing computing architectures face challenges in balancing data security and performance due to the time-consuming nature of encryption and decryption operations, particularly in cache systems where maintaining data in encrypted form introduces latency and degrades performance.

Innovation Solution

A flexible memory encryption and decryption system that allows selective encryption of cached data, controlling which data is stored as encrypted or unencrypted based on access frequency and security needs, applied in processor caches such as CPU, GPU, or FPGA.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data is stored in encrypted form in cache memory, then data security is improved, but access latency increases and performance degrades

Engineering Contradiction:
Improvedata securityVSAvoidaccess latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies different encryption states to different portions of cache data based on security requirements. Frequently accessed cache lines are maintained in unencrypted form for fast access, while less frequently accessed or more sensitive data remains encrypted. This local differentiation resolves the contradiction by providing fast access where needed while maintaining security where required.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system dynamically transitions cache lines between encrypted and unencrypted states based on access patterns and security policies. The encryption status is not static but changes over time according to usage characteristics, allowing the system to optimize between security and performance based on real-time conditions.

Inventive Principle:
Principle #15Dynamics

2Reliability

If entire cache is encrypted, then data security is improved, but system efficiency and performance are degraded

Engineering Contradiction:
Improvedata securityVSAvoidsystem efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The cache memory is segmented into multiple cache lines, each with independent encryption status. Rather than encrypting the entire cache uniformly, the system divides it into manageable units that can be individually encrypted or decrypted based on their specific security and performance requirements.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system applies encryption selectively to only the portions of cache data that require it, rather than encrypting everything. This partial application of encryption maintains security for sensitive data while avoiding the performance penalty of encrypting all cache data.

Inventive Principle:
Principle #16Partial or excessive action

3Ease of operation

If cache lines are frequently decrypted for access, then ease of operation is improved, but energy consumption increases

Engineering Contradiction:
Improvedata accessibilityVSAvoidenergy consumption
Core Design Contradiction:
Ease of operationVSUse of energy by moving object

Solution Approach 1:

The system performs preliminary decryption of cache lines that are predicted to be accessed soon, based on access pattern analysis. By decrypting in advance rather than at the moment of access, the system reduces the frequency of decryption operations while maintaining data accessibility.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The cache system automatically manages encryption and decryption operations based on observed access patterns without requiring external intervention. The system self-adjusts the encryption state of cache lines to balance accessibility and energy consumption.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20250355812A1Selective cache line memory encryption
Publication Date: 2025.11.20 MICRON TECHNOLOGY INC
  • US20250355812A1 patent drawing
  • US20250355812A1 patent drawing
  • US20250355812A1 patent drawing

AI summary

A cache memory can maintain multiple cache lines and each cache line can include a data field, an encryption status attribute, and an encryption key attribute. The encryption status attribute can indicate whether the data field in the corresponding cache line includes encrypted or unencrypted data and the encryption key attribute can include an encryption key identifier for the corresponding cache line. In an example, a cryptographic controller can access keys from a key table to selectively encrypt or unencrypt cache data. Infrequently accessed cache data can be maintained as encrypted data, and more frequently accessed cache data can be maintained as unencrypted data. In some examples, different cache lines in the same cache memory can be maintained as encrypted or unencrypted data, and different cache lines can use respective different encryption keys.