Multilevel Cache Access via Location Attribute Skipping
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Solution Overview
Problem
Current multilevel cache systems experience low efficiency due to the mismatch between CPU operation speed and memory access speed, leading to a high cache miss rate during data read/write operations, as data search proceeds level by level without optimizing cache access.
Innovation Solution
A method and apparatus that acquire a cache location attribute for each physical memory data block to determine the appropriate cache level for storage, querying caches in descending order until a hit is found or all caches are missed, allowing for direct data access in the hit cache or memory, and managing cache refilling and shared data consistency accordingly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data search is performed level by level in multilevel cache (L1, L2, L3), then all caches are searched to ensure data is found, but cache access efficiency deteriorates due to unnecessary searches in caches that cannot store the data
Solution Approach 1:
The patent applies preliminary action by determining the cache location attribute of each physical memory data block in advance. The cache location attribute indicates which cache levels can store the data block. This information is obtained before the data search process, allowing the system to skip unnecessary cache levels during search, thereby improving cache access efficiency while ensuring data is found in appropriate caches
Solution Approach 2:
The patent implements skipping by using the cache location attribute to identify and skip cache levels that cannot store a particular data block. During data search, instead of sequentially checking all cache levels (L1, L2, L3), the system skips caches indicated as unsuitable by the cache location attribute, directly accessing only the appropriate cache levels. This reduces unnecessary search operations and improves access efficiency
2Quantity of substance
If infrequently accessed data is allowed to enter high-level caches, then cache capacity is utilized, but cache hit rate deteriorates due to insufficient resources in high-level caches
Solution Approach 1:
The patent applies local quality by assigning different cache location attributes to different physical memory data blocks based on their access characteristics. Frequently accessed data blocks are assigned attributes that allow them to reside in high-level caches (L1, L2), while infrequently accessed data blocks are assigned attributes that restrict them to lower-level caches (L3) or memory only. This ensures that high-level caches primarily store hot data, maintaining high cache hit rates while still utilizing cache capacity effectively
Data Source
AI summary
A multilevel cache-based data read/write method and a computer system. The method includes acquiring a query address of a physical memory data block in which data is to be read/written, acquiring a cache location attribute of the physical memory data block, querying whether a cache is hit until one cache is hit or all caches are missed, where the querying is performed according to the query address in descending order of levels of caches storable for the physical memory data block, and the levels of the caches are indicated by the cache location attribute, and if one cache is hit, reading/writing the data in the query address of the physical memory data block in the hit cache; or, if all caches are missed, reading/writing the data in the query address of the physical memory data block in a memory.