Cache Locking Without Interrupt Interference
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Solution Overview
Problem
Existing cache locking mechanisms are vulnerable to interference from interrupt-handling code, which can cause cache entries intended to be locked for performance optimization to be reallocated, disrupting the cache replacement algorithm and leading to performance degradation during interrupts.
Innovation Solution
The introduction of a Block Normal Cache Allocation (BNCA) mode, where only predetermined instructions can allocate cache entries, ensuring that locked entries are established without interference from interrupt code, by setting a specific bit in a configuration register to restrict cache allocations to specific instructions during the locking process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If cache entries are locked using traditional mechanisms, then cache hit rate is improved for critical instructions, but interrupt-handling code can still reallocate these locked entries causing performance degradation
Solution Approach 1:
The patent extracts the cache allocation function from interrupt-handling code by introducing a special allocation mode that prevents interrupts from allocating cache entries. This separates the locking operation from interrupt interference, ensuring locked entries remain stable while interrupts can still execute their critical functions without causing performance degradation through cache reallocation.
Solution Approach 2:
The patent implements dynamic cache allocation modes that can switch between normal operation and locking operation. During locking operations, the cache operates in a restricted mode where only specific instructions can allocate entries. This dynamic switching allows the system to adapt between maintaining locked entries and allowing normal interrupt handling, resolving the contradiction between reliability and productivity.
2Loss of time
If cache entries are locked to maximize hit rate, then memory access latency is reduced, but cache allocation algorithms become more complex due to non-contiguous locked entries
Solution Approach 1:
The patent segments the cache into different operational zones by introducing a special allocation mode. This segmentation allows the cache to distinguish between locked entries that should not be replaced and normal entries subject to replacement algorithms. By dividing the cache operation into restricted allocation mode and normal mode, the patent simplifies the replacement algorithm while maintaining low memory access latency for critical entries.
3Speed
If interrupts are allowed to execute during cache locking, then system responsiveness is maintained, but cache entries intended to be locked may be reallocated
Solution Approach 1:
The patent applies preliminary action by establishing the restricted allocation mode before executing the locking operation. This ensures that when interrupts occur during cache locking, they cannot reallocate entries that are intended to be locked. The system maintains responsiveness by allowing interrupts to execute, but the preliminary establishment of the restricted mode prevents precision loss in cache locking.
Solution Approach 2:
The patent introduces a special allocation mode as an intermediary between interrupt execution and cache allocation. This intermediary layer allows interrupts to execute and maintain system responsiveness, while simultaneously preventing them from allocating cache entries during the locking process. The mediator resolves the conflict between maintaining responsiveness and ensuring locking precision.
Data Source
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AI summary
A Block Normal Cache Allocation (BNCA) mode is defined for a processor. In BNCA mode, cache entries may only be allocated by predetermined instructions. Normal memory access instructions (for example, as part of interrupt code) may execute and will retrieve data from main memory in the event of a cache miss; however, these instructions are not allowed to allocate entries in the cache. Only the predetermined instructions (for example, those used to establish locked cache entries) may allocate entries in the cache. When the locked entries are established, the processor exits BNCA mode, and any memory access instruction may allocate cache entries. BNCA mode may be indicated by setting a bit in a configuration register.