Cache Locking Device Invalidated State Management
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Solution Overview
Problem
Current processing devices require software intervention to maintain the locked state of cache lines, leading to increased software size and reduced efficiency, as they automatically unlock cache lines upon external memory access, necessitating periodic re-locking.
Innovation Solution
Implementing a method that automatically changes a cache line's state to an invalid locked state upon external access request, maintaining the locked state without reallocation, thus eliminating the need for software overhead to re-lock invalidated cache lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If software programs monitor and relock invalidated cache lines, then the locked state can be maintained, but software size increases and efficiency decreases
Solution Approach 1:
The cache system automatically detects invalidation events and transitions locked cache lines to an invalid-locked state without requiring software intervention. The hardware monitors coherency status and self-manages the locked state persistence, eliminating the need for software to monitor and relock invalidated lines.
Solution Approach 2:
An invalid-locked intermediate state is introduced between the valid locked state and the unlocked state. This intermediate state allows the cache line to maintain its locked designation while acknowledging data invalidation, serving as a bridge that prevents automatic unlocking while reflecting the invalid status.
2Reliability
If cache lines are automatically unlocked upon external memory access, then coherency is maintained, but locked cache lines require software re-locking
Solution Approach 1:
The lock state and validity state are segmented into independent tracking mechanisms. A cache line can be in a locked state regardless of its validity status, allowing the lock attribute to be preserved separately from the data validity attribute. This segmentation enables the locked state to persist through invalidation events.
Solution Approach 2:
The cache line state parameters are expanded to include four distinct states: valid-locked, valid-unlocked, invalid-locked, and invalid-unlocked. By changing the state parameter system to accommodate the invalid-locked state, the system maintains coherency information while preserving lock status without requiring software re-locking.
3Reliability
If locked cache lines are invalidated without maintaining lock state, then coherency is updated, but the cache line becomes available for reallocation
Solution Approach 1:
The system prepares for potential invalidation events by having the invalid-locked state pre-defined and ready. When invalidation occurs, the cache line smoothly transitions to this pre-prepared state rather than losing its lock status, cushioning against the potential harm of lock state loss and eliminating the need for software re-locking.
Data Source
AI summary
A method and device for locking a cache line of a cache is disclosed. The method includes automatically changing a state of a cache line from a valid locked state to an invalid locked state in response to receiving an indication that a memory location external to the cache and corresponding to the cache line is associated with an access request by a processor or other data access module. Thus, the locked state of a cache line is maintained even after data in the locked cache line is invalidated. By maintaining the invalid locked state, the cache line is not available for reallocation by the cache. This allows locked cache lines that become invalidated to remain locked without additional software overhead to periodically determine whether the lock has been lost due to invalidation of the cache line.