Cache-Mapped Data Compression for Real-Time Low-Memory Throughput

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Solution Overview

Problem

Existing data compression methods prioritize compression gain over speed, which can be detrimental in time-critical applications like multimedia streaming and wireless data transfer, where rapid data delivery is essential.

Innovation Solution

The implementation of a cache mapping compression (CMC) model that utilizes pseudo cache memory to enhance compression speed, allowing for real-time, lossless data compression with low memory consumption and resource usage, enabling faster processing of data streams.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of substance

If traditional data compression methods are used to improve compression gain, then compression ratio is improved, but compression speed deteriorates

Engineering Contradiction:
Improvecompression ratioVSAvoidcompression speed
Core Design Contradiction:
Loss of substanceVSSpeed

Solution Approach 1:

The patent segments the compression process into distinct phases using a two-buffer system: Buffer A for input data and Buffer B for output data. The compression algorithm processes data in discrete blocks, allowing parallel operations and improving throughput without sacrificing compression ratio. This segmentation enables the system to maintain high compression ratios while achieving faster processing speeds through pipelining.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements preliminary actions by pre-initializing the two-buffer system and pre-computing compression parameters before actual compression begins. The system pre-allocates memory buffers and pre-configures the compression algorithm, eliminating setup overhead during runtime. This preliminary preparation enables the compression process to operate at maximum speed from the start of data processing.

Inventive Principle:
Principle #10Preliminary action

2Loss of time

If compression processing time is reduced for real-time applications, then delivery time is improved, but compression ratio deteriorates

Engineering Contradiction:
Improvedelivery timeVSAvoidcompression ratio
Core Design Contradiction:
Loss of timeVSLoss of substance

Solution Approach 1:

The patent ensures continuity of useful action by implementing a continuous compression pipeline using two buffers that operate in an overlapping manner. While Buffer A is being processed, Buffer B is being filled with compressed output, and vice versa. This continuous operation eliminates idle time and maintains constant compression throughput, achieving real-time compression without sacrificing compression ratio by keeping the compression algorithm continuously engaged at full efficiency.

Inventive Principle:
Principle #20Continuity of useful action

3Speed

If more memory resources are allocated for compression processing, then compression speed is improved, but memory consumption increases

Engineering Contradiction:
Improvecompression speedVSAvoidmemory consumption
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

The patent implements dynamic memory management where the two-buffer system adapts its memory usage based on the compression workload and data characteristics. The buffer sizes can be dynamically adjusted during operation, allowing the system to optimize between speed and memory consumption in real-time. This dynamic approach enables the compression process to use memory efficiently while maintaining high processing speeds through intelligent resource allocation.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8085171B2High-speed data compression based on set associative cache mapping techniques
Publication Date: 2011.12.27 UNIVERSITY OF MISSISSIPPI
  • US8085171B2 patent drawing
  • US8085171B2 patent drawing
  • US8085171B2 patent drawing

AI summary

A method is provided for compressing data from a stream of values using one or many distinct memory addresses as workspace, each memory address containing one or many values. The method works by reading two contiguous data values, of length K and N bits, from the stream, as a memory address reference (MAR) and a symbol, respectively. If the symbol does not match any of the values in the memory address pointed to by MAR, the symbol replaces one of those values, and a MISS code, followed by the symbol, is appended to the compressed stream; otherwise, a HIT code is appended to the compressed stream, said code representing a function of the location where the matched value was found in the memory address. Advantageously, the workspace behaves analogous to a cache memory used in computer architecture, allowing hardware or software parallel implementations using content addressable memory or associative arrays.